公司介紹

產業類別

聯絡人

潘小姐

產業描述

IC設計相關業

電話

03-5711161

資本額

傳真

暫不提供

員工人數

50人

地址

新竹市光復路二段101號北校區創新育成中心107室


公司簡介

瓦雷科技成立於2016年,由多位資深IC設計與記憶體/存儲領域專家在舊金山及新竹共同創立,2021年底完成B輪募資。目前董事會包含:創辦人項春申博士、創意電子前總經理賴俊豪先生、Marvell創辦人Dr. Sehat Sutardja、旺宏電子微電子及記憶體事業群副總經理倪福隆先生等四位成員。(https://www.wolleytech.com/index.php/menu-about-us/menu-board-of-director) 瓦雷科技多年來深耕記憶體領域,專注於擴展客戶所需之軟硬體設計,協助全球客戶實現各項加值需求。以無需查表SCM控制器及PCIe/CXL IP技術為基礎,瓦雷科技提出CXL Native Memory、 NVMe-over-CXL 與 CXL Persistent Memory等產品概念,在減少晶片尺寸、降低功耗、提升效能等方面具有顯著優勢,尤其適用於解決 AI PC 或者資料中心在執行大型語言模型等各式應用所遭遇的記憶體/存儲運算瓶頸。 CXL為全球發展重點。瓦雷科技之CXL成果獲聯盟官方與Xilinx認可列於供應商名單,與客戶合作之PCIe/CXL FPGA驗證平台也於2023年2月通過PCI-SIG compliance認證;有助於推升台灣廠商對於CXL技術之掌握及加速產品開發,共享市場商機,前景值得期待。

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主要商品 / 服務項目

本公司專注於IC設計、記憶體控制器領域等關鍵技術研發,目前核心技術與營業項目簡述如下: 1.SCM控制器:結合下世代低延遲非揮發性記憶體,填補DRAM與NAND Flash間效能落差。 2.CXL Type 3矽智財:與國際大廠合作並提出CXL HBM memory、switch、Chiplet等解決方案。 3.技術服務:提供關鍵技術授權、ASIC/SoC設計服務等。

公司環境照片(1張)

福利制度

法定項目

其他福利

1.表定上班時間:09:00-18:00,本公司實施彈性上班制 : 08:00-10:30 均為上班時段 2.每月可申請兩天work from home,有特殊需求者可增加天數 3.到職首年即享6天特休(含勞基法滿半年之3天特休) 4.每年享優於勞基法之4天彈性休假 5.每年享優於勞基法之10天有薪病假 6.依法勞保/健保/勞退提繳,並享有免費團險 7.享三節獎金或禮品 8.每月定額交通費補助與每年員工健康檢查補助 9.提供社團活動經費補助 10.每季定期舉辦員工聚餐 11.每季定期舉辦慶生聚會,不定期下午茶Happy Time 12.無限提供星巴克膠囊咖啡&各項零食 13.全面採用人體工學座椅

工作機會

廠商排序
7/14
新竹市經歷不拘大學以上待遇面議
1. SoC top/sub-system architecture planning and design integration. 2. SoC design implementation from logic synthesis to physical implementation. 3. Work with multiple teams and drive RTL to GDS flow. [Requirement] 1.Familiar with Verilog HDL and digital IC design flow, including RTL sign-off, Synthesis, LEC, STA, timing-signoff. 2.Better to have DFT/ATPG and MBIST knowledge. 3.Better to have FPGA implementation experience.
應徵
9/01
新竹市經歷不拘大學以上待遇面議
1. Design verification with SystemVerilog/UVM, C/C++ 2. Integration test environment with VIP 3. Develop checker and scoreboard. 4. Verify design with SystemVerilog assertion. 5. Test plan for a verification task. [Requirement] 1. Familiar with SystemVerilog HDL, OOP, Python, TCL, and shell programming. 2. Better to have SoC design and bus concept.
應徵
9/01
新竹市經歷不拘大學以上待遇面議
[job description] Wolley is seeking candidates for a digital design engineer position. You will join an experienced team designing next-generation memory, storage controllers, and high-speed interface standard. You will also contribute to design concept discussion, architecture definition, as well as design implementation. ‧ Architecture design and RTL implementation ‧ System bus and related peripheral designs ‧ SoC and emulation platform design ‧ SoC system performance analysis [Requirement] 1. Bachelor's or Master's degree in Electrical Engineering or related fields 2. Familiar with RTL design, SystemVerilog, front-end design flow 3. The following working knowledge is desired: * Python programming * TCL scripting * Universal Verification Methodology (UVM) * Low power design and analysis
應徵
8/16
新竹市經歷不拘大學以上待遇面議
Wolley is seeking candidates for a firmware design engineer position. You will join an experienced team designing next-generation memory and storage controllers. You will be responsible for firmware design, implementation, verification and customer support. You will be contributing in one or more of the following domains: PCIe/NVMe, CXL, NAND, eMMC, FTL. You will also involve part of design verification works and contribute to system architecture design. 1. Familiar with embedded system programming/debugging in Linux development environment and C. 2. Familiar with bare-metal programming 3. Familiar with one of any real-time OS usage 5. Capable of working closely with HW design team (e.g., control specification discussion, hardware bug report) 6. Capable of identifying performance bottleneck in terms of hardware and firmware
應徵
9/01
新竹市3年以上大學以上待遇面議
1. 一般會計帳務,並具鼎新SMART實務操作經驗 2. 負責申報營業稅、營所稅及各類所得調節表等稅務作業 3. 編製財務報表 (資產負債表、損益表、現金流量表, 境外合併報表等) 4.資金預估及銀行往來台外幣存匯作業 5.配合會計師查帳作業 6.行政支援及其他主管交辦事宜
應徵
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