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18975人

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台北市內湖區基湖路8號


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About NVIDIA -- Career Site https://www.nvidia.com/en-us/about-nvidia/careers/ NVIDIA 以其革命性產品 GPU 為核心,協助全球開發者與研究人員進行人工智慧、機器學習與視覺運算的創新與應用,深耕電競、專業視覺化、資料中心與自駕車四大領域,除了硬體上的支持,NVIDIA 也針對各項重點市場提供軟體、作業平台與開發者套件,同時舉辦包含GPU技術大會與深度學習實作坊在內的教育訓練與講座,持續開發新技術並拓展相關市場。

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主要商品 / 服務項目

與業界最具天分的專業菁英一起工作 NVIDIA 產品涵蓋視覺運算的所有層面,從基礎發明到結合 GPU 的處理器,再到系統元件,乃至完全整合系統。我們將目標放在三大垂直市場: 遊戲、專業視覺化與設計,以及高效能運算與巨量資料分析。NVIDIA 針對每一垂直市場提供處理器、軟體、工具、行銷和專業知識的平台,另外更逐漸增加提供連線服務。此外也銷售元件,並授權 IP 給希冀以豐富繪圖能力打造差異化裝置的各大 OEM,充分發揮我們針對這些市場所做的創新。 身為視覺運算的全球領導者,NVIDIA 招募此領域中的最佳頭腦,藉由他們的創造力推動產業向前進,成為NVIDIA的驅動力。因此我們的品牌激發出罕見的品牌忠誠度,並以各種獨特的個人風格表現包括插圖、刺青,甚至有粉絲將小孩命名為「NVIDIA」。

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福利制度

為您與家人帶來的福利 NVIDIA員工努力開發全球最佳的視覺運算技術。同樣的,NVIDIA亦提供完整優渥的福利方案! NVIDIA為員工及家人提供最好的支持,協助他們在生活與職場生涯中取得最佳的平衡點。 【醫療保險】 NVIDIA重視員工的健康與福祉,為所有員工提供完善的醫療福利: •勞工保險 •全民健康保險 •團體保險(涵蓋定期壽險、重大疾病險、傷害險、醫療險、職業災害險、癌症險、疾病門診險、海外旅遊平安保險等) •公司針對員工眷屬及子女也提供部分醫療補助,照顧員工的事業與家庭,讓員工無後顧之憂 【健康管理方案】 •年度健康檢查 •流感疫苗免費接種 【財務福利】 •員工購股方案 (ESPP) 【休假福利】 NVIDIA的企業文化就是全力工作。但NVIDIA亦瞭解每個人都須偶爾放鬆與休閒或處理私人事務。NVIDIA提供優於勞基法所規定之休假,讓同仁找到工作與生活之平衡 •週休二日 •國定假日 •特休年假 •彈性休假 •給薪病假 •婚假 •產假 •陪產假 •喪假 【教育訓練】 鼓勵同仁在工作之餘,也能提昇自我知識技能。協助同仁達成工作要求,推動公司的成長,包含語文訓練、在職訓練、管理發展訓練、員工生涯發展訓練等。 【其他福利】 •結婚津貼/生育津貼/生日禮金 •喪葬補助 •員工推薦計畫 •員工協助方案 要列出NVIDIA 所有 “其它福利”並不容易,因為隨著NVIDIA努力提供更優渥的福利之際,福利內容會持續修改。

工作機會

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廠商排序
7/02
台北市內湖區經歷不拘專科以上待遇面議
This role is intended to create a talent pool of candidates with disabilities. When suitable openings arise, we will match and refer candidates to relevant teams based on their skills and experience. If your background aligns with a current opportunity, we will contact you directly. If there is no suitable match, you will not receive further notice. We kindly ask that you do not follow up by phone or submit multiple applications. 本職務為身心障礙人士建立人才庫之用,須具備身心障礙證明。當出現適合的職缺時,我們將依據您的專業背景與技能,推薦至相應部門。 若條件符合,我們將主動聯繫;如未獲通知,代表目前暫無合適職缺,恕不另行通知。請勿來電詢問申請進度,亦請避免重複投遞。
應徵
7/02
新竹市2年以上碩士以上待遇面議
We are looking for a senior engineer to be part of the mixed-signal design team building next generation NVLINK. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. You will be responsible for the development and implementation of high speed interfaces, including TX/RX/Clocking/PLL. You will have hands on experience taking innovative integrated circuit designs at data rates of 50Gbps and higher from concept through silicon characterization. What you will be dong: - Define circuit requirements and complete design from schematic, layout, and verification to characterization. - Conduct schematic design of deep-submicron CMOS technologies using Spectre, Hspice or like. - Take responsibility for the architecture, transistor design and verification using industry standard EDA tools such as Cadence virtuoso. - Optimize circuit to meet the specifications for system performance. - Work with layout engineers by providing detailed floorplan and guidance for matching and high-speed routings. - Provide support for post-silicon bring-up and debugging. What we need to see: - Master of Science or foreign equivalent degree in Electrical Engineering, Computer Engineering or related field with strong analog design background. - Minimum 2 years analog design experience in industry - CMOS Analog / Mixed Signal Circuit Design Experience in deep sub-micron process (especially in FINFET) - Experience with design and verification tools (Cadence's IC design environment, analog circuit simulation tools like Spectre, HSpice, Finesim, XA) - Experience in crafting test bench environments for component and top level circuit verification - Behavioral modeling of analog and digital circuits - Strong debugging and analytical skills - Analog simulation for noise analysis, loop stability analysis, ac/dc/tran analysis, monte-carlo, etc. - Strong communication skills and ability & desire to work as a great teammate are huge plus. - All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, citizenship, disability or protected veteran status.
應徵
7/02
新竹市5年以上碩士以上待遇面議
We are looking for a Senior Mixed-Signal / Analog Circuit Designer – someone who is excited to join a growing group of diverse individuals responsible for handling challenging high-speed mixed-signal circuit designs. NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can pursue, and that matter to the world. This is our life’s work, to amplify human creativity and intelligence. What you'll be doing: - You will be part of an analog team developing high-speed chip interfaces and complex analog functions that enable our graphics processing units (GPU) and SoC products (Tegra) - Design state-of-the-art mixed-signal circuits in deep sub-micron CMOS technologies. - Work closely with physical/layout engineers to floorplan and implement physical design of these functions. - Support debug, characterization and support product through high-volume production. - If you have the dream to learn and explore new technologies and have good analytical skills, this is the ideal position for you. What we need to see from you: - Have a MSEE or PhD in Electrical Engineering with a minimum of 5 years of relevant circuit design experience. - Proven understanding of analog circuit layout concepts in submicron CMOS technologies - You have experience in more than one of the following areas: digital links for display interfaces (such as HDMI, LVDS, DVI, MIPI PHY, Display Port), USB, low-jitter clock synthesis using PLL techniques, IO pads, high-speed serial links, and ADC. - Able to communicate in spoken and written English - Work effectively in a team, good communication skills, enthusiasm and positive energy. - Proficiency in scripting languages like perl, python, skill etc. - Experience with design and verification tools (Cadence's IC design environment, analog circuit simulation tools like HSpice, Finesim, XA) - You are an expert with Cadence custom circuit design tools - particularly virtuoso - Experience running and debugging DRC and LVS with verification tools We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status. We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation.
應徵
7/02
新竹市5年以上碩士以上待遇面議
We're now looking for a Senior Digital Design Verification Engineer! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can tackle, and that matter to the world. This is our life’s work, to amplify human imagination and intelligence. Make the choice to join our diverse team today! As a Senior Digital Design Verification Engineer at NVIDIA, you'll verify the design and implementation of our cutting edge SerDes IPs. This ground breaking technology will enable and accelerate gaming, artificial intelligence, deep learning, and autonomous driving. We have put together a best-in-class team that delivers IPs that will be consumed by standard as well as industry-leading proprietary high-speed protocols! What you'll be doing: - Verification of the digital design, golden models and micro-architecture of the SerDes IPs using advanced verification methodologies such as UVM. - Build reusable bus functional models, monitors, checkers and scoreboards following coverage driven verification methodology. - Responsible for understanding the design and implementation, define the verification scope, develop the verification infrastructure and verify the correctness of the design. - Write and execute test plan and thoroughly verify a design in a product shipment focused / compressed schedule. - Work with architects, designers, and pre and post silicon verification teams to accomplish your tasks. What we need to see: - Bachelors or Masters Degree (or equivalent experience) in Electrical Engineering, Computer Science, or Computer Engineering - At least 5 years of proven experience. - Background in verification at Unit/Sub-system/SOC level and expertise in SystemVerilog a must. - Experience using random stimulus along with functional coverage and assertion-based verification methodologies a must. - Experience in verification methodologies like UVM/VMM and exposure to industry standard verification tools for simulation and debug. Ways to stand out from the crowd: - Expertise in bus or interconnect protocols (e.g. PCI Express, USB, SATA) a big plus. - Experience in verifying complex SerDes system, understanding mixed-signal designs, and have experience in modeling of analog circuits a big plus. - Perl, Python, C/C++ programming language experience. - Good debugging and analytical skills. - Good communication skills & dream to work as a great teammate. With competitive salaries and a generous benefits package, NVIDIA is widely considered to be one of the most desirable employers in the world. We have some of the most brilliant and talented people in the world working for us. If you are creative, autonomous and love a challenge, we want to hear from you. We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status.
應徵
7/02
新竹市2年以上碩士以上待遇面議
We are looking for an Engineer to verify the design and implementation of the world’s leading SoC's and GPU's. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of extraordinary people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the high-speed Serdes platform for the future of computing. What you'll be doing: - As a key member of our circuit verification team, you will verify the design and implementation of the industry's leading GPU - Responsible for verification of the Mixed Signal CMOS circuit design, architecture, golden models using advanced verification methodologies - You are expected to understand complex mixed-signal CMOS circuits design and implementation, define the verification scope, develop the verification infrastructure and verify the correctness of the design. - Work closely with Multi-functional teams, circuit and logic design, verification, test engineering to accomplish tasks. What we need to see: - Bachelors Degree in EE, CS or CE with at least 2 years of relevant experience or an Advanced Degree with equivalent experience - Experience in deep sub-micron process design experience in CMOS Analog / Mixed Signal Circuit Design - Background with design and verification tools (Cadence's IC design environment, analog circuit simulation tools like HSpice, Finesim, XA) - Experience in crafting test bench environments for component and top level circuit verification - Expertise in System Verilog or similar HVL - Strong debugging and analytical skills - Perl and C/C++ programming language experience desirable - Strong communication skills and ability & desire to work as a great teammate are huge plus. With competitive salaries and a generous benefits package, NVIDIA is widely considered to be one of the most desirable employers in the world. We have some of the most brilliant and talented people in the world working for us. If you are creative, autonomous and love a challenge, we want to hear from you. We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status.
應徵
7/02
台北市內湖區經歷不拘大學待遇面議
NVIDIA’s invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing — with the GPU acting as the brain of computers, robots, and self-driving cars that can perceive and understand the world. Today, we are increasingly known as “the AI computing company.” We're looking to grow our company, and build our teams with the smartest people in the world. Would you like to join us at the forefront of technological advancement? We are now looking for a passionate, world-class computer scientist to work in its Compute Developer Technology (Devtech) team. What you’ll be doing: Study and develop cutting-edge techniques in deep learning, graphs, machine learning, and data analytics, and perform in-depth analysis and optimization to ensure the best possible performance on current and next-generation GPU architectures. Work directly with key customers to understand the current and future problems they are solving and provide the best AI solutions using GPUs. Collaborate closely with the architecture, research, libraries, tools, and system software teams at NVIDIA to influence the design of next-generation architectures, software platforms, and programming models. What we need to see: A good degree from a leading university or equivalent experience in an engineering or computer science related discipline (MS or PhD preferred). Experience with parallel programming, ideally CUDA, OpenCL and OpenACC. Confident knowledge of C/C++ and/or Fortran. Solid knowledge of software design, programming techniques, and algorithms. Strong mathematical fundamentals, including linear algebra and numerical methods. Good communication and organization skills, with a logical approach to problem solving, good time management, and task prioritization skills. Knowledge in a specific domain is a plus, such as Deep Learning, Machine Learning, Atmospheric Science, Optics and Photonics.
應徵
7/02
新竹市經歷不拘大學待遇面議
We are part of the global engineering team at NVIDIA that designs state-of-the-art GPUs for all applications, such as supercomputers, gaming consoles, and self-driving cars. Come join us in our mission to Engineer the next generation of best-in-class products. Our team's focus is on the architecture and design of CMOS and Silicon-Photonics high-speed chip interfaces (NVLink, IEEE, PCIE, USB, OIF) and other complex photonic functions. We are seeking a senior level, self-driven professional with proven expertise to develop leading-edge test solutions for silicon photonics (SiPh) integrated circuit designs in the growing data center and high-performance computing markets. You will have the opportunity to work on developing high-speed active and passive photonics components, and contribute to the development of the next-generation photonics program. What You Will Be Doing: Develop codes for Silicon Photonic test stations and automation. Collaborate with photonic device designers. Work with other test engineering and design validation teams to perform full test and device characterization of silicon photonic devices. Partner with module developers and design teams to do electro-optical testing of the modules. Collaborate with external instrument vendors to ensure seamless software and control integration. Work closely with hardware and software teams on functionality, interfaces, and documentation. What We Need To See: MS or higher degree with a preference in EE, Physics, or material science. 5+ overall years of working experience in a related field on optical systems or opto-electronics devices. Knowledge of optical systems, modules, components, and photonics devices (lasers, detectors, modulators, transceivers, DWDM system.) Experience in test programing (Python, LabView, .net, etc.) with various instruments for semiconductor device testing, wafer probers and/or optical module testing. Familiar with optical component characterization techniques and optical test equipment is a plus. Experience of database (SQL) and data analysis tool (JMP, R, Python, etc.) Excellent written and verbal communication skills.
7/02
台北市內湖區3年以上大學以上待遇面議
Welcome to apply here: https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/Taiwan-Taipei/System-Design-Validation-Engineer_JR1995771 We are looking for Design Validation Engineer in Taipei for board/system power qualification and function test, responsible for NVIDIA Data Center platform, Graphics board, ARM Based platform and Autonomous Driving Platform. If you're creative and autonomous, we want to hear from you! What you'll be doing: - Server/Motherboard/Mobile system functionality test. - Clock/Sequency/GPIO signal measurement and verification. - WAT (wide area test) function test. - Gaming test. - High/Low speed interface SI test. - Co-work with hardware design engineers on debug and FA. - Co-work with mechanical/thermal engineers for cooler/heatsink design. What we need to see: - Bachelor/Master in EE, computer science, or relative majors. - Proficient with Linux system and GPU setup. - Capable of writing simple shell scripts and analyzing test results using commands. - Familiar with PC and Datacenter system hardware assembly, MB BIOS upgrade, and network troubleshooting - Proficient with a programming language (C/C++, Python, Java, or Perl) - Understand UEFI boot OS startup process and out-of-band (OOB) management using BMC, ipmitool, and redfish. - Good English communication skills - 3 years’ experience or above Ways to stand out from the crowd: Experience in measuring DC-DC power solution. Proactive personality. Good team player. Strong desire on creativity. Quick thinking.
應徵
7/02
新竹市5年以上碩士以上待遇面議
We are now hiring for a Senior Logic and Digital Circuit Design Engineer! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can take on, and that matter to the world. This is our life’s work, to amplify human creativity and intelligence. Make the choice to join us today. As a member of our Mixed-Signal high-speed I/O SerDes group, you'll be working on NVDIA's latest ground breaking technology that enables and accelerates gaming, artificial intelligence, deep learning, and autonomous driving. Your design will be consumed by standard as well as industry-leading proprietary high-speed protocols, and will serve as one of the key IPs in many complex SoC. You'll work closely with analog designers and system architects to independently come up with micro-architecture specification and refine adaptation algorithms. You'll then implement the RTL in SystemVerilog, define test cases that will deeply verify the design and carry out test creations. Next is to define and build constraints for synthesis and drive for timing closure. In addition to RTL design, you'll need to understand the analog schematics and write SystemVerilog models that collects the functionality of those circuits in the most precise way. What you'll be doing: - You will be working with ASIC controller teams to define a unified interface - Help in streamlining workflows with proper scripts to increase efficiency and enables reusability - Be actively involve in silicon bringup, build scripts that can be used for debug, QA, characterization and ATE What we need to see: - You should have a B.S. or MS degree in Electrical Engineering or equivalent experience - 5+ years of experience working in high-speed I/O digital design, knowledge at protocol level (SATA, PCIE, USB) preferred - Have a deep understanding of Verilog or SystemVerilog, logic design and circuit modeling in RTL for mixed-signal blocks - Experience with industry standard verification methodologies, such as UVM - Proven experience with custom digital circuit design and adaptation algorithms, such as DFE, CTLE, CDR, and offset cancellation - Experience with static timing tools (nanotime, primetime) and formal verification tools - Have a strong background in Perl and Python scripting - If you have a background in computer architecture and deep learning, this is a plus With competitive salaries and a generous benefits package, NVIDIA is widely considered to be one of the most desirable employers in the world. We have some of the most brilliant and talented people in the world working for us. If you are creative, autonomous and love a challenge, we want to hear from you. We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status.
應徵
7/02
台北市內湖區3年以上大學待遇面議
Please prepare your English resume and apply via NVIDIA Career Site: https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite?q=test&locations=91336993fab910af6d6f5eaae3acc14e NVIDIA is widely considered to be one of the technology world's most desirable employers. We have some of the most brilliant and talented people in the world working for us. If you're creative and autonomous, we want to hear from you! You will work closely with internal software development to come out good test infrastructure and develop test tools. Who would like challenge job? Who want to learn most popular AI framework? The job will give you the best challenge and achieve next career level. What you'll be doing: • The Job need to validate NVIDIA Enterprise Product server System and Security FW feature and automated it. Reproduce/analyze/verify customer issues. • You will work closely with internal software development to come out good test infrastructure and develop intelligent tools for optimums validation process. What we need to see: • BS or higher degree in Computer Science (or equivalent experience) and 5+ years of work experience. • Strong working knowledge of PCIe spec, verification, error injection related tests, and failure analysis. • Developing technical validation solutions to security vulnerabilities • Familiar with ACPI, UEFI, IPMI spec, and knowledgeable/experience on server FW validation. • Good communication/coordination/teamwork ability with develops/venders/internal team. • Ability to handle multi tasks at the same time. • Develop automation test infrastructure based data center. • Strong Linux development and debugging experience. Ways to stand out from the crowd: • Linux Python script/automation/tools creation. • Experience of working with teams in US. • Working in multi cultural environment. • Experience of developing x86/ARM based environment. • Have implemented error handling for x86/ARM based servers, online and offline health monitoring tools.
應徵
6/30
台北市內湖區5年以上大學以上待遇面議
NVIDIA is looking for Senior HPC/AI Solutions Architect to join its Professional Services team. Academic and commercial groups around the world are using NVIDIA products to revolutionize deep learning and data analytics, and to power data centers. Join the team building many of the largest and fastest AI/HPC systems in the world! We are looking for someone with the ability to work on a dynamic customer focused team that requires excellent interpersonal skills. This role will be interacting with customers, partners and internal teams, to analyze, define and implement large scale AI/HPC projects. The scope of these efforts includes a combination of Networking, System Design and Automation and being the face to the customer! What you will be doing: Primary responsibilities will include managing and maintaining AI/HPC infrastructure in Linux-based environments for new and existing customers. Support operational and reliability aspects of large scale Kubernetes clusters with focus on performance at scale, real time monitoring, logging and alerting Engage in and improve the whole lifecycle of services—from inception and design through deployment, operation and refinement. Maintain services once they are live by measuring and monitoring availability, latency and overall system health Provide feedback into internal teams such as opening bugs, documenting workarounds, and suggesting improvements. Be part of an on call rotation to support production systems What we need to see: 5+ years providing in-depth support and deployment services, solving problems for hardware and software products. Knowledge and experience with Linux System Administration, process management, package management, task scheduling, kernel management, boot procedures/troubleshooting, performance reporting/optimization/logging, network-routing/advanced networking (tuning and monitoring). HPC/AI Cluster management technologies EX: Bright Cluster Manager Minimum of a four-year degree from an accredited university or college or equivalent experience in Computer Science, or Electrical or Computer Engineering. Scripting proficiency(Bash, Ansible, etc). Good interpersonal skills with the ability to maintain and deliver resolutions for customer blocking issues as they arise. Strong organizational skills and ability to prioritize/multi-task easily with limited supervision. Experience with HPC/AI Schedulers, primarily Kubernetes, with consideration for Slurm, LSF, etc. Way to stand out from crowd: InfiniBand experience. Experience with GPU focused hardware/software. Experience with MPI. Automation tooling background (Ansible, Salt, Puppet etc.. Ethernet and Parallel Storage technologies
應徵
7/02
台北市內湖區經歷不拘碩士以上待遇面議
We are looking for a Senior Developer Relations Manager to lead and expand how NVIDIA connects with the research community in Taiwan. It is a dynamic, leadership role responsible for strategic relationships with core researchers and premier academic institutions, guiding and contributing to our existing and new programs that help researchers in the region to understand and solve their most challenging computational problems using NVIDIA’s technologies and platforms. This role is a high-profile position as an expert in modeling, simulation, accelerated computing, deep learning, digital twins. In this important role, will drive the engagement with top researchers to increase GPU and SDK adoption. You will play a significant role in defining future features for NVIDIA’s AI-informed models and simulation frameworks. An ideal candidate has a technical background in scalable modeling and simulation techniques, graphics, AI/ML/data science, as well as large-scale computing systems and scientific programming. Growing and cultivating the ecosystem of developers who use NVIDIA platforms to lead the AI revolution is a critical mission. The role is very closely aligned with our strategic priorities. What you will be doing: Promote NVIDIA’s portfolio of SDKs and accelerating its adoption within the academic research community and develop a rich ecosystem of strategic research partners and help them achieve their goals through close and active collaboration. Work with NVIDIA product management and various engineering teams to define software and hardware components needed to complement technical solutions identified by the academic community. Serve as a spokesperson, representing NVIDIA in the local and global strategic events such as conferences, workshops, briefings, meetups, academic seminars. Collaborate with NVIDIA engineers, SDK product and framework teams, Deep Learning Institute (DLI), and NV Research to ensure developer enablement materials are best-in-class and fully aligned with technology roadmaps. Act as a technical authority on NVIDIA SDKs and frameworks for consultation and competitive analysis. Champion the use of NVIDIA technology stack among researchers in Taiwan. Participate and actively contribute to internal researcher engagement strategic management frameworks. Survey relevant research and business literature to identify emerging trends, notable innovations and opportunities to improve our products. Ensure a positive experience for external researchers and partners while working cross functionally within our organization. What we need to see: M.S./Ph.D. in Computer Science, Information Technology, Engineering, Data Science, Computational Physics, Applied Mathematics, or equivalent experience. C/C++ and Python programming experience. Experience in conducting research in domains such as high-performance computing, computer vision, image analysis and processing, computer graphics, deep learning, simulations, computational physics, artificial intelligence, natural language processing, robotics, digital twins. Experience in High-Performance Computing (HPC), parallel programming, and GPU-accelerated computing. Experience in using deep learning frameworks such as Tensorflow, Pytorch, MXNet. Excellent written and verbal communication skills. Experience speaking publicly to technical and scientific audiences. Ability to work in a team environment and learn new technologies quickly. Ability to influence and work with an extraordinary product and engineering team. Ways to stand out from the crowd: Existing relationships with a wide range of leading researchers and top research institutions. Experience working with NVIDIA SDKs. Working through product development and deployment using GPUs. MBA degree with focus on strategic management is a big plus.
應徵
7/02
台北市內湖區5年以上大學待遇面議
Welcome to apply from NVIDIA Career page: Server: https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/Taiwan-Taipei/Senior-System-Application-Engineer_JR1996786-1 Notebook: https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/Taiwan-Taipei/Senior-System-Application-Engineer_JR1996805 We're Application Engineering team and searching for System Engineer to engage for partner development in ARM-based (Grace CPU) and X86-based servers with NVIDIA solutions. NVIDIA is creating the future of computing and looking for passionate, dedicated, and forward-thinking individuals to help make that happen. What you’ll be doing: - System-level tool development/debug from the product segment needed. - Join the partner design review through system architecture, schematics, and layout, thermal and validation plan. - Work with partners for issue analysis and root cause. - Drive with partner's design quality. - Provide tech training to customers. - Overseas travel will be required if needed. What we need to see: - Master's Degree or equivalent experience in Computer Science/Computer Engineering/Electrical Engineering or related field. - 5+ years of server or PC design work experience. - High-Speed Signal design/ Strong knowledge of GPU Server System Architecture includes X86 and ARM-based. - Familiar with Linux. Good concept of thermal and mechanical design. - Skills of ARM Server System Architecture are a strong plus. Skills of Python/Perl is a plus - Knowledge of the PCIe architecture with AER (Advanced Error Reporting). - Excellent communication skills, flexibility in task assignments, and working under pressure. - Strong communications skills in English, Innovative, Independent, results-oriented problem solver. Ways to stand out from the crowd: -Strong oral & written communication skill (both English and Chinese). -Development experiences in datacenter design or server product. -Self-motivated and aggressive to learn
應徵
7/02
台北市內湖區5年以上大學待遇面議
Welcome to apply here: Server FW: https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/Taiwan-Taipei/Senior-Firmware-Application-Engineer_JR1996803 Notebook FW: https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/Taiwan-Taipei/Senior-Firmware-Application-Engineer_JR1996803 We are looking for Server/ Notebook Firmware Application Engineer in NVIDIA Taipei office. NVIDIA is leading the way into the high-growth areas of High-Performance Computing, Artificial Intelligence, and Computer Gaming. The company is pushing hard the technology in all areas. The GPU Application Engineering team is searching for ARM Firmware Engineer to engage for partner development in ARM-based servers with NVIDIA solutions. You'll find the work is exciting, fun, and meaningful challenges to work for NVIDIA leading solutions into Enterprise partners platform. What you’ll be doing: .Work with customers to provide deep technical assistance in NVIDIA ARM requirements into customer Enterprise platforms OR Notebook system. .Assist to achieve fully optimized design with NVIDIA products and provide customer feedback as to product features and software enhancement. .Work for customers ARM-Grace Enterprise platform bring up, issues analysis and root cause till mass production. .Required tools development focus on NVIDIA Enterprise product segments needed. .Provide tech training to customers for new ARM-based Enterprise engagement/ Notebook. .Overseas travel will be required if needed. What we need to see: .BS or MS degree (or equivalent experience) in Computer Science/Computer Engineering/Electrical Engineering or a related degree field. .5+ years of significant software development experience. .The skill of ARM Server System Architecture, also understands X86 will be another plus. .Familiar with Linux skill/operation, BMC will be the strong plus. .Experiences on ARM features developing specifically for Enterprise platforms OR Notebook system that include the security and UEFI (BootLoader) implement/BIOS. .Skills of C/C++/ Python/Perl. .Excellent communication skills, flexibility in task assignments, and working under pressure. Ways to stand out from the crowd: .Strong oral & written communication skills (both English and Chinese). .Self-motivated and aggressive to learn.
應徵
7/02
新竹市3年以上大學以上待遇面議
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world. What you will be doing: • Work with architects and design engineers to define verification scope, strategies, and verify designs at both block and full chip level. • Develop verification infrastructure of next generation SoCs. What we need to see: • Masters Degree in EE, CS or CE or equivalent work experience. • 3+ years of industry experience. • Proficiency with System Verilog, UVM, C/C++. • Experience with verification of SoCs with embedded processors at block level and full chip level. • Deep understanding of verification concepts. • Outstanding analytical skills and problem-solving skills. • Good written and verbal communication skills. Ways to stand out from the crowd: • Familiarity with SoC concepts such as CPU, memory, interconnects, clock/reset, high speed IO protocols, security, etc. • Ability to analyze architecture and micro-architecture spec and define test plan. • Experience in building verification infrastructure. • Experience in writing C++/SystemC models. • Experience working in a globally distributed team. • Proficient scripting experience in Python, Perl, tcl, Make, shell.
應徵
7/02
台北市內湖區5年以上大學以上待遇面議
NVIDIA is looking for a Senior Design Engineer for our Coherent High Speed Interconnect team! The NVLINK-C2C enables the creation of a new class of integrated products with NVIDIA partners, built via chiplets, allowing NVIDIA GPUs, DPUs, and CPUs to be coherently interconnected with custom silicon. To learn more about NVIDIA's ultra-fast chip interconnect technology visit: https://www.nvidia.com/en-us/data-center/nvlink-c2c/. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of outstanding people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. What You'll be Doing: - Work on architecture and design of our state-of-the-art high speed coherent interconnects (NVLINK-C2C) for our mobile SoCs and GPUs. - Collaborate with architects, external partners, software engineers, and circuit designers to deliver a class leading high speed coherent interconnect. - Optimize design based on features, requirements, and system limitations” What We Need to See: - BS or equivalent experience in Electrical Engineering or Computer Engineer or related degree required. - 5+ years or relevant design experience and knowledge in architecture, RTL design, performance analysis and power optimization. - Knowledge of industry standard interconnect protocols like PCIE, CXL, AXI, CHI will be useful. - Strong working knowledge of Verilog or System Verilog. - Good communication skills and interpersonal skills are required. Ways to stand out from the crowd: - Master or PhD degree will be a preferred. - A history of mentoring junior engineers and interns a huge plus. With competitive salaries and a generous benefits package, NVIDIA is widely considered to be one of the most desirable employers in the world. We have some of the most brilliant and talented people in the world working for us. If you are creative, autonomous and love a challenge, we want to hear from you. We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status.
應徵
7/02
新竹市1年以上大學以上待遇面議
ASIC PD team is hiring both junior and senior engineers, whose work scope is physical design from RTL to GSDII: design quality check, synthesis, formal check, partitioning, constraint (for both design and process), async check, timing analysis/fixing/signoff, also all related flow. Join us, you will work together with expertise in all these areas; you will not only work for physical application, but also drive physical friendly design with all related teams; you will work for the most advanced process/technology, the biggest chip in the world. What you’ll be doing: .STA for hierarchical design. .Constraints creation and validation, timing budget. .Timing closure for hierarchical design. .Special timing closure, such as io, test, clock etc. .Async design checks. .Synthesis, Netlist quality check, Formal Verification. .Implement chip partition and floorplan. .Function eco creation .Develop and enhance entire timing closure flow from frontend (pre-layout) to backend (post-layout) .Flow automation development, Methodology in any of above areas. What we need to see: .BSEE, MSEE is preferred .Project experience in IC design implementation .Courses taken in circuit design, digital design .Hand-on experience in EDA software from Synopsys (DC/PT/Formality), Cadence (LEC) is preferred Ways to stand out from the crowd: .Proficient user of Perl, Python or TCL is preferred .Excellent English communication skill NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most brilliant and talented people on the planet working for us. If you're creative and autonomous, we want to hear from you!
應徵
7/02
台北市內湖區3年以上大學待遇面議
NVIDIA has been redefining computer graphics, PC gaming, and accelerated computing for more than 30 years. Today, we are increasingly known as “the AI computing company” — with the GPU deep learning ignited modern AI, acting as the brain of computers, robots, and self-driving cars etc. We are hiring Sr. Software Engineer who will help build outstanding simulators for our DGX Server platforms. Simulations play a meaningful role in building scalable systems at Speed of Light! You will work with world class engineering teams across HW and SW to build scalable simulation platforms for SW development not only in pre-silicon stage but even after the HW platforms are available. What you’ll be doing: - Drive requirements, architecture, and roadmap of NVIDIA DGX Simulation platforms. - Build and drive implementation of the simulation platform based on the requirements. - Leverage simulation and emulation platforms from other teams and 3rd party vendors as appropriate. - Provide support and maintenance to the internal and external users, as needed. What we need to see: - Proficient in C / C++ with strong software development, optimization, user & kernel mode debugging skills. - OS fundamentals and system architecture understanding (like low-level interfaces such as buses, controllers, interrupts etc). - Familiarity with at least one major Linux distro (Ubuntu, RedHat, SLES etc.) - Strong Interpersonal skills to work with a globally distributed engineering team. - Bachelor’s degree in Computer Science or related with 3+ years of relevant experience . Ways to stand out from the crowd: - Experience in virtualization, hypervisors & building HW simulators, like in Qemu, KVM, VDK, SIMICs etc. - Experience in HW & SW stack bringup using Simulators & Emulators etc. - Familiarity with hardware interfaces such as PCIe, SPI, I2C etc with Linux Boot solutions on x86 & ARM class platforms. - Having written software in GitHub with exposure to opensource development life cycle. NVIDIA is committed to encouraging a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.
應徵
7/02
台北市內湖區經歷不拘大學以上待遇面議
NVIDIA’s invention of the GPU in 1999 fueled the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern deep learning — the next era of computing — with the GPU acting as the brain of computers, robots, and self-driving cars that can perceive and understand the world. Today, we are increasingly known as “the AI computing company.” We're looking to grow our company and establish teams with the most thoughtful people in the world. Are you ready to change the next generation of computing? Join us at the forefront of technological advancement. What you’ll be doing: • Designing, implementing, and delivering innovations for managing GPU based AI servers with focus on OOB management, firmware development, server architecture and building systems for enterprise. • Working with a global team of BIOS developers on NVIDIA server designs. • Designing and developing performance optimized UEFI/BIOS solutions using industry Standards. • Instrumenting code to ensure maximum code coverage, writing and automating unit tests for each implemented module and maintain detailed unit test case reports. • Providing software quality reports based on static analysis, code coverage, CPU load. • Working with security team to ensure developed code is in line with product security goals. • Working closely with hardware teams to influence hardware design and review HW architecture & schematics. • Working with QA/Test architects to come up with proper test tools and automation for qualifying the whole system software and firmware stack. What we need to see: • Domain expertise in System BIOS (UEFI) Firmware development on X86 or ARM Platforms. • Strong experience with AMI/Insyde or EDK2 Firmware architecture. • Solid experience of end-to-end delivery of high-end enterprise servers from definition to customer deployment. • Solid understanding of low-level interfaces between SBIOS, BMC and OS like I2C/SPI/PCIe/JTAG etc. PCIe enumeration, IO at platform level for enterprise systems. • Solid experience with RAS. • Experience working closely with HW teams, ODMs and vendors to introduce and support server platforms. • Experience with C/C++ development, bash/python for scripting, and debugging skills in embedded Linux operating environments. • You should possess excellent written and oral communication skills, good work ethics, high sense of team-work, love to produce quality work and commitment to finish your tasks every single day. You are a self-starter who loves to find creative solutions to exciting problems. • Bachelor’s Degree or higher; in Electrical Engineering or Computer Science, and 8 years of experience, with demonstrated strong ability as individual contributor. Ways to stand out from the crowd: • Proven record in delivering system BIOS design on servers • Experience working with AMI/Insyde BIOS solutions on x86 designs.
應徵
7/02
台北市內湖區經歷不拘大學以上待遇面議
NVIDIA’s invention of the GPU in 1999 fueled the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern deep learning — the next era of computing — with the GPU acting as the brain of computers, robots, and self-driving cars that can perceive and understand the world. Today, we are increasingly known as “the AI computing company.” We're looking to grow our company and establish teams with the most thoughtful people in the world. Are you ready to change the next generation of computing? Join us at the forefront of technological advancement. What you’ll be doing: • Designing, implementing, and delivering innovations for managing GPU based AI servers with focus on OOB management, firmware development, server architecture and building systems for enterprise. • Leading BMC firmware design with a global team of engineers. • Designing and developing performance optimized active monitoring BMC solutions using DMTF Standards including MCTP, Redfish, SPDM and PLDM specifications. • Instrumenting code to ensure maximum code coverage, writing and automating unit tests for each implemented module and maintain detailed unit test case reports. • Providing software quality reports based on static analysis, code coverage, CPU load. • Working with security team to ensure developed code is in line with product security goals. • Working closely with hardware teams to influence hardware design and review HW architecture & schematics. • Driving definition and end to end delivery of all platforms by collaborating with internal teams, ODMs/OEMs and industry partners for AI servers. • Working with QA/Test architects to come up with proper test tools and automation for qualifying the whole system software and firmware stack. What we need to see: • Domain expertise in embedded Linux designs and kernel development. • Preferred experience in BMC Firmware development on X86 or ARM Platforms including BMC-BIOS communication, thermal management, power management, firmware update, device monitoring, firmware security, etc. • Solid experience of end-to-end delivery of high-end enterprise servers from definition to customer deployment. • Solid understanding of low-level interfaces like I2C/SPI/PCIe/JTAG etc. PCIe enumeration, I/O at platform level for enterprise systems. • Experience working closely with HW teams, ODMs and vendors to introduce and support server platforms. • Experience with C/C++ development, bash/python for scripting, and debugging skills in embedded Linux operating environments. • You should possess excellent written and oral communication skills, good work ethics, high sense of team-work, love to produce quality work and commitment to finish your tasks every single day. You are a self-starter who loves to find creative solutions to exciting problems. • Bachelor’s, Master’s Degree, or a PhD; in Electrical Engineering or Computer Science, and 8 years of experience, with demonstrated strong ability as individual contributor. Ways to stand out from the crowd: • Proven record working on embedded Linux projects with concrete examples of design and debug. • Proven record in delivering BMC or equivalent manageability stack for enterprise servers with AMI SPX firmware stack.
應徵
7/02
台北市內湖區2年以上大學以上待遇面議
NVIDIA is seeking an elite Verification Engineer to verify the design and implementation of the next generation of PCI Express controllers for the world’s leading GPUs and SOCs. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of outstanding people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. At NVIDIA, our employees are passionate about parallel and visual computing. We're united in our quest to transform the way graphics are used to solve some of the most complex problems in computer science. The GPU started out as an engine for simulating human imagination, conjuring up the amazing virtual worlds of video games and Hollywood films. Today, NVIDIA’s GPU simulates human intelligence, running deep learning algorithms and acting as the brain of computers, robots, and self-driving cars that can perceive and understand the world. NVIDIA is increasingly known as “the AI computing company.” What you’ll be doing: - Verification of the ASIC design, architecture, and micro-architecture of PCIE controllers for multiple product generations for GPUs, SOCs & DPUsat IP/sub-system levels using standard verification methodologies such as UVM and Specman/e. - Develop UVM or Specman/e based testbench components reusable across verification methodologies and integrate those across verification environments. - Build or improve reusable testbench components including constraints, stimulus, monitors, checkers and scoreboards following coverage based verification methodology. - Understand complex testbench and its verification scope with respect to the design specification and implementation, define new verification scope as per design or verification methodology requirements, develop test plans, tests, and the verification infrastructure and verify the correctness of the design. - Collaborate with multiple verification teams, architects, designers, and pre and post silicon verification teams to accomplish your tasks. What we need to see:  - B.Tech./ M.Tech. with 2+ years of relevant experience - Experience in verification at Unit/Sub-system/SOC level using Verilog and SystemVerilog - Background with verification of IP or interconnect protocols (e.g. PCI Express, USB, SATA) - Experience in developing and working in functional coverage based constrained random verification environments - Experience in DV methodologies like UVM/VMM and exposure to industry standard verification tools for simulation and debug Ways to stand out from the crowd:  - Knowledge of PCIE protocol - Gen3 and above - Proficiency in Testbench development using SystemVerilog - Perl, Python or similar scripting and SW programming language experience - Good debugging and analytical skills - Good interpersonal skills & dream to work as a great teammate With competitive salaries and a generous benefits package, NVIDIA is widely considered to be one of the most desirable employers in the world. We have some of the most brilliant and talented people in the world working for us. If you are creative, autonomous and love a challenge, we want to hear from you. We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status.
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