公司介紹

產業類別

聯絡人

吳小姐

產業描述

IC設計相關業

電話

03-5750293

資本額

傳真

暫不提供

員工人數

5人

地址

新竹市東區光復路二段295號13樓之4


公司簡介

昱叡電子是一家專注於先進半導體邏輯製程下嵌入式記憶體領域的公司。我們致力於拓展客戶所需的記憶體 IP 硬體規格與設計,協助全球客戶實現各項加值需求。

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主要商品 / 服務項目

嵌入式記憶體IP

公司環境照片(2張)

福利制度

法定項目

其他福利

勞基法相關:勞健保;特休假;彈休;有薪事假;每年補助員工健檢費用。 辦公室福利:免費咖啡;不定期下午茶。

工作機會

廠商排序
8/22
新竹市經歷不拘碩士以上待遇面議
Job desicription: Our Design Team specializes in the challenging field of Non-Volatile Memory (NVM) IC circuit design. We are actively seeking an experienced Analog Circuit Design Engineer to contribute to our cutting-edge developments in embedded NVM solutions and surrounding circuitry. As a key member of our team, you will be responsible for the design, verification, and debugging of essential analog building blocks like Bandgap references, LDOs, and Charge Pumps. A significant part of your role will involve designing critical memory peripheral circuits for NVM IP and test chips, including Array interfaces, Decoding logic, and Sense Amplifiers. Your responsibilities will span the design lifecycle, from contributing to IP specifications and core circuit design to ensuring performance through layout optimization and comprehensive corner simulations of NVM IPs. We are looking for candidates with proven expertise in analog circuit design, ideally with prior experience in embedded memory or NVM technologies. If you are an experienced analog designer eager to tackle complex challenges in non-volatile memory, we encourage you to apply and help shape the future of memory technology.
應徵
8/22
新竹市經歷不拘碩士以上待遇面議
Job description Join our innovative team specializing in cutting-edge embedded memory solutions. We are seeking Analog Circuit Engineers to play a key role in the design and development of high-performance embedded DRAM and associated peripheral circuits. In this position, you will be responsible for the complete cycle of DRAM circuit design and simulation verification. Your tasks will involve developing novel circuit topologies, transistor-level design, optimizing performance metrics, and ensuring robust functionality through extensive simulations using industry-standard EDA tools. Required qualifications include a strong technical background in Electrical Engineering, Electronics Engineering, Computer Engineering, Physics, or a closely related field. Candidates must possess demonstrated, significant experience in DRAM circuit design and comprehensive simulation verification methodologies. Ideally, candidates will have proven design experience in specific DRAM-related circuit blocks, including but not limited to: Row and Column Decoder circuits Control path logic DC-DC converters, Charge Pumps, and Bandgap References Delay Locked Loops (DLLs) and Phase Locked Loops (PLLs) Negative voltage generators (NVG) and other critical peripheral circuits This is an excellent opportunity to contribute to state-of-the-art embedded memory designs in a dynamic, collaborative environment. If you are a skilled analog designer passionate about solving complex challenges in DRAM circuitry, we encourage you to apply and help shape the future of embedded memory technology.
應徵
8/21
新竹市經歷不拘碩士以上待遇面議
1. 依據產品功能調適與開發測試程式。 2. 記憶體IP規格測試、特性分析、可靠度分析。 3. 測試報告書。
應徵
8/27
新竹市經歷不拘碩士以上待遇面議
1. Device characterization and test key design. 2. 元件量測並提供desinger相關規格數據 3. 記憶體陣列設計
應徵
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