安霸股份有限公司

The rapid acceleration of deep learning is leading to new generations of high-performance and low-power architectures to bring cutting edge computer vision algorithms to diverse new markets. At Ambarella, architecture engineers work at the forefront of this technological leap in computer architecture by designing new systems to accelerate key functions of computer vision. Studying industry trends across deep learning and computer architecture, we create new ideas and concepts for software systems and hardware design, justify and document new features and train others to leverage the most of our architecture. Our team members translate algorithms into hardware design specifications, identify performance bottlenecks, optimize system performance and build our knowledge into software libraries to benefit other internal teams and external customers across different target markets. Our team works closely with all members of our high level software, compiler and SoC design teams, thus our team clearly communicates in both verbal and written form. We actively seek candidates with strong background in either architecture, hardware modeling or software performance optimization experience to join an exciting cross-functional team to deliver the next generation of Ambarella's computer vision processors. [Responsibilities] - Model performance critical areas of the hardware architecture, identify performance bottlenecks and propose solutions. - Develop expertise in neural network structures and their evolution as it applies to image processing, computer vision and robotics. - Apply graph theory and network analysis to understand and solve resource allocation problems in neural networks. - Develop performance analysis infrastructure and tooling. - Interface with various teams in the organization for data collection and productization of solutions.

1. Software integration and debugging on IP Camera products 2. Study and debug issues on IP Camera applications including image processing, AE/AWB/AF algorithm, video compression, network application and camera functions. 3. Travel to U.S., Korea and China to co-work with customers for debugging and integration issues. 4. Contact window for customers, coordinate internal resources and manage project schedule.

1. Maintain and develop camera calibration algorithm. 2. Maintain and develop simulation tool.

IK Engineer is a core software engineer who develops image processing kernel modules to control the DSP pipeline for generating impressive photos and videos. Key responsibilities: 1. Developing image process module on SDK with different OS. 2. Verifying image process module correctness. 3. Support APP designers to use our APIs to implement image processing functions such as High Dynamic Range Video, Multi-Fov Video, High Dynamic Range capturing, special digital effects. 4. Provide timely, efficient, and courteous service for Customers.

1. Software development on embedded system (familiar with RTOS, including ThreadX, QNX and GreenHills is a plus) 2. Computer vision and neural network development on embedded system 3. Device driver programming on RTOS or Linux (experience with device driver programming is a plus) 4. Project planning and execution, product specification discussion etc.

1. Develop and implement Visual-Odometry and Visual-SLAM algorithm 2. Develop and implement other advanced machine vision related algorithm

The engineer will be responsible for the design and development of optimization tools for neural networks, transformers, and large language models (LLMs). This role involves applying post-training, training-aware, and other advanced optimization techniques to enhance model efficiency and performance. Key responsibilities: 1. Develop optimization toolchains for computer vision models and large language models (LLMs). 2. Perform hardware-aware model optimization and porting for Ambarella platforms. 3. Research and evaluate emerging technologies, including pruning, quantization, and fine-tuning techniques for convolutional neural networks (CNNs), transformers, and LLMs. 4. Provide technical support and solutions to customers regarding model optimization and deployment.

The engineer will be responsible for the design and development of a computer vision compiler targeting neural networks, transformers, and large language models (LLMs). This role involves leveraging a variety of techniques, including operation expansion, load balancing, data pipelining, and advanced optimization strategies to improve efficiency and performance throughout the compilation process. Key responsibilities: 1. Develop an optimization compiler for computer vision models and LLMs. 2. Perform hardware-aware compiler optimizations. 3. Research methods to improve compilation time, inference speed, and model accuracy. 4. Provide technical support and solutions for model optimization and deployment.

Develop and maintain neural network compression algorithm and tool

1. Develop the computer vision toolchain to ensure the efficient use of hardware resources. 2. Develop and maintain neural network optimization algorithm and tool.

1.Tapeout with multi-million gates count SOC design on cutting-edge technologies. 2.Develop UDSM design methodology for timing/power/reliability/DFM closures and low power designs. 3.Implement and enhance design infrastructure for the increases on productivity and quality.

1. Test and verify the computer vision toolchain in Linux environment. 2. Report toolchain issues on tracking system. 3. Co-work with RD engineer to ensure the toolchain matches requirement.

• Signal Integrity Analysis: - Perform timing analysis, transmission line theory assessments, and conduct eye diagram and jitter analysis to ensure optimal signal performance. - Work on differential pair design and high-speed interface simulations (e.g., PCIe gen6, LPDDR5x, USB, HDMI, Ethernet). • Power Integrity Analysis: - Analyze power delivery networks, execute IR drop analysis, and mitigate power noise and EMI/EMC challenges. - Design and optimize decoupling capacitor placement to maintain power stability. • High-Speed PCB Design: - Collaborate closely with layout engineers and hardware/IC design teams to establish PCB stackup designs and routing standards. - Validate designs using industry-leading simulation tools. • Simulation & Analysis Tools: - Utilize tools such as Ansys SIwave/HFSS, Cadence Sigrity, Keysight ADS, HyperLynx, and LTSpice/PSpICE for comprehensive SI/PI assessments. • Cross-Functional Collaboration: - Work with multidisciplinary teams to ensure that all designs meet stringent performance and compliance requirements. - Lead design reviews, testing, and debugging efforts using advanced instrumentation such as oscilloscopes, VNAs, and TDR equipment. • Customer Project Support: - Provide simulation analysis support for customer projects, ensuring that their specific requirements and challenges are thoroughly addressed and met with optimal solutions. • Simulation automation and data gathering analysis: - Utilize tools such as Python, Matlab or TCL or similar tools is a plus.

• IC Failure Analysis • IC characterization • IC reliability tests • Foundry process monitoring

【身心障礙人才招募專區】 為維護身心障礙人才就業權益，特別規劃聘僱身障人才專區，歡迎領有身障手冊者加入！ 1.為增加身心障礙人才就業機會，本職務為建立身心障礙人才履歷資料庫使用。 2.歡迎持身心障礙手冊朋友主動投遞，不限身障類別與程度 (請註明身障類別與使用輔具) 3.求職者工作經驗不拘，職務內容將依學經歷及個人意願安排面談。如有合適職務，我們將主動與您聯繫。不適合者則不會另行通知。(恕不接受隨到隨談) 4. 視個人學經歷表現薪資可議。

• Use Voltus to check IR drop. • Chip IR signoff : provide the result and solution to APR & package team • Chip level PEM/SEM simulation and fixing plan providing. • SIR/DIR/PEM/SEM result data review and verification. • Power mesh/power density flow development and related flow development and enhancement.

- 生產計劃制定與執行 - 物料需求規劃與執行 - 產能規劃

• Primary AMBA contact for customer's tactical and strategic team members. Primary points of contact are Sales OPS and Operation Team in Taiwan. • Responsible for handling customer-initiated transactions via phone and e-mail. Internal liaison. • Provide quotes, obtain orders, and customer forecasts. • Manage samples, sales orders, sales order changes, and confirmations. • Communicate regarding product deliveries and availability. • Explain policies and business practices that affect customer transactions. • Develop new business processes as required to support customer requirements. • Manage customer demand and work with the Operation team in Taiwan to ensure customer product requirements and expectations are being met. • Team with internal technical support groups (Hardware Engineering, Software Engineering, and Applications Engineering, Customer Quality Engineering, Marketing Group) to facilitate technology and product information transfer. • Methods include specifications, E-mail, conference calls, and face-to-face meetings. • Managed customer forecasts by working closely with the sales team. Resolve any discrepancies with the customers and sales team before the forecast is submitted to regional sales by the due date. • Provide daily and weekly reports to the Sales Team on Backlog/Shipments/To-be-Booked. • Maintain running history of engineering samples, development units, production units, and SW license. • Have an ownership of RMA management. • Establish relationships with decision-makers to better understand customer expectations and gain an understanding of the customers' business processes related to supporting AMBA products. • Customer follow-up for payment overdue

1. Developing OS-level API/software and Device driver for different OS (ThreadX, Linux, QNX, etc) 2. Implement ARMv8-A/R MMU/Security/GIC related software features. 3. Bring up Advanced Hardware/Software features of next-generation Ambarella SoC. 4. Building Mass Production Quality Software for Ambarella SDK. 5. Support internal teams for project specific request or debugging.

1. Know well ISO26262, ASPICE & ISO21434 and import it into workflow and execution. 2. Ensure the workflow and documents conform to ISO26262, ASPICE & ISO21434. 3. Write documents for system testing plan with engineers. Conduct testing process by the plan and produce the testing report.