安霸股份有限公司

We are seeking a Computer Vision Framework Engineer to join our innovative team. As a key member of our development team, you will be responsible for designing, developing, and optimizing computer vision frameworks that power our cutting-edge applications. Key Responsibilities: - Design and Develop: Create robust and efficient computer vision frameworks using C programming language, ensuring high performance and scalability. - Optimize: Implement and optimize computer vision framework for various applications, ensuring real-time processing capabilities. - System Integration: Collaborate with other engineers to integrate computer vision frameworks into larger systems, considering hardware constraints and system-level performance. - Debug and Troubleshoot: Identify and resolve issues within the computer vision framework, ensuring stability and reliability across different platforms. - Documentation: Maintain clear and comprehensive documentation of the framework’s architecture, codebase, and usage guidelines. - Collaboration: Work closely with cross-functional teams, including software developers, hardware engineers, and product managers, to deliver high-quality solutions.

1. VLSI Advance Technology Node (2nm and Below) Physical Design Implementation. 2. Comprehensive scope to touch, including chip floorplanning, a variety of design closures on timing, signal integrity, power integrity, DFM as well as physical verifications. 3. Develop physical design flows/solutions on the cutting edge technology node.

Developing and improving the quality management system in accordance with IATF 16949 standards. Maintaining and improving the quality management system in accordance with ISO9001 & ISO14001 standards. Document control: Overseeing the documentation process to ensure all quality-related documents are accurate, up-to-date, and properly managed. Key responsibilities: 1. Developing and improving the IATF16949 compliance quality management system. 2. Support procedure documentation for other departments. 3. Plan and conduct internal audit. 4. Maintain regular quality review records, management review, internal audit, ISO certification audits….. 5. Document control 6. Tasks assigned by supervisor

Role Description: A System-on-Chip (SoC) Design Engineer is responsible for designing, developing, integrating, and verifying integrated circuits that combine multiple IPs into a single chip. The role involves collaboration across various functional areas, including digital design, verification and physical design. Key responsibilities: Essential functions and duties of this position include but are not limited to the following: - Architecture & Specification: • Define and document system requirements. • Develop architectural specifications for the SoC design. - RTL (Register-Transfer Level) Design: • Write Verilog RTL code. • Integrate IPs into SoC. • Implement design logic to meet performance, power, and area goals. • Clock structure and IOMUX planning. • RTL and netlist sanity check. - IP Integration: • Integrate third-party and internally developed IP blocks (CPU cores, GPUs, DSPs, memory interfaces). • Validate IP functionality and ensure compatibility within the SoC. - Verification collaboration: • Co-work with verification team for bug fix. - Physical design collaboration: • Collaborate with physical designers for synthesis, and timing closure. • Optimize designs for power, area, and timing constraints.

We are looking for talented engineers to join our VLSI Verification team. You’ll work on next-generation SoCs, applying advanced verification methodologies (SystemVerilog/UVM, coverage-driven, assertion-based) and leveraging AI-assisted tools to accelerate testplan writing, assertion development, and debug. Responsibilities • Develop and execute verification plans for complex SoCs/IPs • Build testbenches, assertions, and coverage models • Collaborate with architects, designers, and post-silicon teams • Ensure correctness and reliability of cutting-edge designs Why Join Us • Cutting-edge verification with AI-powered flows • Work alongside global world-class engineers • Accelerated growth in a learning-driven culture If you are smart, curious, and eager to learn, join us and shape the future of silicon innovation! 我們正在尋找聰明好學的工程師，加入我們的 VLSI Verification 團隊。 這裡沒有高壓的文化，而是重視 自主、學習與創新。我們相信工程師應該能專注在真正有價值的問題上，並透過 simulation 與 formal verification 技術搭配 AI 輔助，大幅提升驗證效率。 工作內容 • 開發與執行 SoC/IP 驗證計畫 • 使用 simulation (模擬) 與 formal (形式驗證) 技術，確保設計正確性與可靠性 • 建立 testbench、assertion、coverage model • 與架構師、設計師及 post-silicon 團隊合作完成驗證流程 • 善用 AI 工具 加速 testplan 撰寫、assertion 開發與 debug 我們能提供 • 外商文化：自主彈性、無高壓管理，重視結果與學習 • 技術前沿：結合 simulation + formal verification 與 AI 驅動流程 • 成長環境：與世界級跨國工程師共事，快速提升專業實力 • 全球影響力：你的成果將應用於數百萬使用者的產品 如果你聰明、積極、樂於學習，想在自由又專業的環境中挑戰自我， 歡迎加入我們，和我們一起打造下一代晶片驗證技術！

Role Description: The IDSP Algorithm Development Engineer is responsible to develop image processing algorithm. This role focuses on researching, designing, and implementing advanced image processing algorithms for various imaging applications. The ideal candidate will have a strong background in digital signal processing, computer vision, and algorithm development. Key responsibilities: • Design and develop innovative image processing algorithms for various imaging applications. • Optimize algorithms for performance, memory usage, and power efficiency • Create and maintain technical documentation for algorithms and implementations • Collaborate with cross-functional teams to integrate algorithms into production systems • Analyze and improve existing image processing pipelines • Conduct performance analysis and optimization of implemented algorithms • Develop proof-of-concept prototypes to validate new approaches

A Digital Image Signal Processing Software Engineer in Ambarella for researching and developing advanced traditional or AI-based ISP and realize them on Ambarella future chips. At the same time, you will also be responsible for customer support for image quality tuning/suggestion/discussion for their product. Key responsibilities: 1. Advanced AI image signal process research and development 2. Traditional digital image signal process research and development 3. Worldwide customer project image quality tuning support