Synopsys Taiwan Co., Ltd._台灣新思科技股份有限公司

請統一上官網投遞履歷: https://careers.synopsys.com/job/hsinchu/3dic-cowos-r-and-d-engineer-principal/44408/84120544704 We are looking for an Advanced Packaging R&D who will help to develop 3DIC and advanced packaging solutions for Synopsys IP and test chip to meet performance and reliability requirements, come up with design guidelines and best practice, and help customers explore their package solution space options. Candidates with advanced packaging technology, assembly process flow, material selection, TSV, and their impact to package reliability experience required. Can-do attitude, quick learning, and solid electronic skills are assets. You will be working with a global, highly skilled and very supportive team. Responsibilities: -Foundry and OSAT interface person for 3DIC and advanced packaging vendor evaluation, technology selection, feasibility study, design, manufacturing, assembly, test, and qualification -Drive internal cross-functional teams for 3DIC, interposer and substrate design and development from packaging technology perspective -Perform thermal simulation for IP sign off, come up with integration design guideline, best practice -Drive IP and chiplet development from DFM an DFR perspective, material selection, cross-section, die thickness, die-stacking, TSV placement, bonding pad design -Drive internal 3DIC tool feature development and validation to meet IP group needs -Market study of emerging packaging technology development, competitive analysis, and recommendation to our package development direction -Pre- and Post- IP sales packaging technology support Requirements: -Domain expertise of 3DIC, advanced packaging and organic substrate technology, silicon, interposer, substrate manufacturing process, assembly flow, functional and reliability test, and qualification -Deep understanding of core and build up material mechanical/electrical property, trade-off, CTE mismatch, TSV impact to warpage, stress, reliability, and Chip Package Interaction (CPI) -Thermal and multi-physics modeling and simulation with Ansys tools -Knowledge and experience with advanced packaging, 3DIC offering from different foundries and OSAT -Knowledge and experience with 2.5D/3D/3.5D heterogeneous integration technologies such as SoIC, CoWoS, WoW, EMIB, xCUBE and OSAT solutions -Experience with wafer bumping, package assembly, substrate technology, BOM selection, testing and product development lifecycle. -Good to have substrate and interposer design experience/exposure, SIPI knowledge to understand trade-offs among electrical, thermal and mechanical requirement -Strong communication skills and be a team player -Bachelor/Master of Science in physics, materials, mechanical, chemical, or electrical engineering. MS or PhD preferred -Minimum of 15+ years of relevant experience in semiconductor manufacturing, packaging or related field

The primary focus of this Verification Applications Engineer is to support the sale and adoption of the Synopsys Verification solution. As a Verification AE, you will be driving the effort to enable the verification methodology and solution for customers using Synopsys Verification tools. Must possess in-depth knowledge of RTL low power design, verification and power analysis. You will work directly with customers to assist with the deployment of the verification tools and methodologies, resolve technical issues and provide technical training.. We’re the world’s leading provider of solutions for designing and verifying advanced silicon chips. And we design the next-generation processes and models needed to manufacture those chips. We enable our customers to optimize chips for power, cost, and performance—eliminating months off their project schedules. Education Requirements: o College degree(or above) in Electrical Engineering/ Computer Science. Skills/Experience: o Good team player and communication skills. o Good Knowledge of RTL coding , Chip Design experience or verification env. architect experience,. Understanding ＂big picture＂ at the ASIC architectural and system level with experience on real block/soc verification experience . o Testbench creation and Verification regression o Familiar with scripting language like Perl/Python/Tcl/CSH/BASH/Makefile. o Fluent English on reading/writing (esp technical spec ). Nice to have: o Experience on UVM verification or implementation o Experience on UPF verification or implementation o Experience on power reduction and analysis on RTL design. o Familiar with one of following protocols : AMBA/USB/PCIE/DDRx . o Familiar with one of following tool : VCS/Verdi/Spyglass

Synopsys is uniquely positioned to offer the most complete verification solution in market today.The emulation platform of Synopsys verification flow, it’s the industry’s performance & capacity leader in Emulation. As an Application Engineer for emulation, candidate will be primarily responsible for successful deployment and evaluation of Synopsys emulation solution. He/She will closely work with customers, Sales, Marketing and R&D teams to resolve complex technical issues, presales evaluations, post-sales support, develop collaterals. Candidate will help analyze and resolve complex design verification and software validation issues for customers cutting edge ASIC/SoC designs. The position offers a great opportunity to grow by learning state-of-art verification flows from Synopsys. Requirements: 1.College degree(or above) in Electrical Engineering/ Computer Science. Skills/Experience 2.Good team player and communication skills. 3.Good Knowledge of RTL coding , Chip Design experience or verification env. architect experience,. Understanding ＂big picture＂ at the ASIC architectural and system level with experience on real block/soc verification experience . 4.Good expertise on emulators like Palladium/Veloce/Zebu or FPGA compile/runtime/debug are preferred. 5.Familiar with scripting language like Perl/Python/Tcl/CSH/BASH/Makefile. 6.Fluent English on reading/writing (esp technical spec ). 7.Familiar with one of following protocols : AMBA/USB/PCIE/Ethernet Nice to have: 1.Experience on driver/FW FPGA development. 2.Familiar with one of following tool : VCS/Verdi/ProtoCompiler

Responsible for designing, developing, troubleshooting, or debugging software programs. Develops software tools including operating systems, compilers, routers, networks, utilities, databases and internet-related tools, etc. Determines hardware compatibility and/or influences hardware design. Usually developing professional expertise, and may apply company policies and procedures to resolve a variety of issues. At a minimum, has working knowledge of work area and general proficiency with tools, systems, and procedures required to accomplish the job. Exercises judgment to determine appropriate action. Implementations and solutions are reviewed for accuracy and overall adequacy. Builds productive internal/external working relationships.

Responsible for designing, developing, troubleshooting, or debugging software programs. Develops software tools including data structures, algorithms, compilers, utilities, and databases etc. tools, etc. Experience in programming software for algorithms, unix operating system, and/or job control languages, and some knowledge of software capabilities. Designs algorithms and data structures. Experience on development of complex software projects, familiarity with C/C++ coding, and a strong background in data structures and algorithms. Has strong desires to learn and explore new technologies and demonstrates good analysis and problem-solving skills. Prior knowledge and experience of CAD tool development are required. Possesses a solid understanding of specialization area plus working knowledge of one other related area. Resolves issues in creative ways. Exercises independent judgment in selecting methods and techniques to obtain solutions. Executes projects from start to completion. Contributes to moderately complex aspects of a project. Determines and develops recommendations to solutions. Works on team-driven or task-oriented projects. Networks with senior internal and external personnel in own area of expertise.

Job Description · Become a trusted advisor to the customer for EDA tools · Coordinate with sales and marketing to find new opportunities, position ICV for success, and increase ICV business · Influence the buying decisions through technical success (product demos, tapeouts, evaluations, etc) · Enable customers to use product successfully and autonomously (installation, script assistance, training, etc) · Deploy and train customers on new and advanced product features · Solve customer problems to build trust with product · Manage issues (bugs) to resolution with customer and product team · Drive product enhancements as needed to support business · Develop workarounds to meet customer deliverables · Educate product team and peers about technical trends and opportunities Key Qualification · Master Degree in Electrical Engineering,/ Computer Science · Experience in digital design/ physical design or physical verification of semiconductors is a plus · UNIX navigation and scripting (Perl, Tcl and Python) · Presentation skills

We are searching for a technical architect with positive thinking and collaborative attitude. Your role is to provide strategic guidance to meet customer needs and expectations cost-effectively. Responsibilities and Duties ● Drive technical innovation and automation for custom design solutions ● Review and examine product feedback from customers and application partners ● Collaborate with field and sales teams on customer engagement ● Define technical roadmap and specifications while balancing with business goals, resources, and schedule Qualifications and Skills ● A master's degree in EE or CS is required ● 15 years' experience in large-scale software development and programming (C/C++, TCL/Python, Qt) ● Physical layout experience is a plus ● Proficient written and verbal communication skills in English ● Drive results ● Create networks with crucial action makers

Role and Responsibility - To be the product professional to drive the success of Synopsys RTL2GDS design flow and tools focusing on Design Compiler, Fusion Compiler and RTL Architect. - Be the interface between customers and product teams to deploy the synthesis solutions to help customers successful with their design requirements - Be responsible for product application, product deployment, professional training and benchmark. Works closely with R&D and sales team - Able to work exclusively as well as in a team environment - Experienced user of synthesis tools such as Design Compiler, Fusion Compiler, RTL Architect or other EDA tools. Advanced nodes, physical design, low power, DFT and formal check experience is a plus - Good scripting skills and understanding of RTL - Good understanding of RTL2GDS design flow, high performance design, low power design methodologies - Self-motivated & solid communication skill - Good command of English and people skills are required Preferred Experience - BS/MS with 5+ years of direct hands-on design experience in using frontend synthesis and/or backend physical design Place & Route tool

請務必投遞官網(50259BR): https://sjobs.brassring.com/TGnewUI/Search/home/HomeWithPreLoad?PageType=JobDetails&partnerid=25235&siteid=5359&jobid=2008002#jobDetails=2008002_5359 At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you. Our Silicon Design & Verification business is all about building high-performance silicon chips—faster. We’re the world’s leading provider of solutions for designing and verifying advanced silicon chips. And we design the next-generation processes and models needed to manufacture those chips. We enable our customers to optimize chips for power, cost, and performance—eliminating months off their project schedules. Applications Engineer We're looking for an Applications Engineer to join our team. Does this sound like a good role for you? This is an exciting opportunity to be part of a fast-paced Applications Engineering team that is changing the industry landscape in the area of library characterization and transistor-level timing analysis. As a specialist in characterization, you will work closely with customers to solve complex technical challenges in areas of statistical analysis, electro-migration, timing & power modeling, and signal integrity analysis. Through innovative techniques and ideas, you will help enable customers to accurately validate these components in standard cells, high-speed custom macros, low-power circuits, complex programmable logic circuits, and memory designs. Key Qualifications BSEE/MSEE 3+years of experience in at least one area - custom digital design, standard cell design/characterization, memory design/characterization 1.Solid understanding of timing, power, statistical and electro-migration characterization, and signal integrity 2.Experience with applications deployment on cloud architectures (AWS, Azure, etc) desired 3.Knowledge of static timing analysis and path level correlation using STA tools desired 4. Experience with industry-standard tools like Siliconsmart, NanoTime, Liberate, NCX, PrimeTime, PrimePower, and Library Compiler 5.Working knowledge of Spice tools like Finesim, CustomSim, Hspice, Eldo, and Spectre 6.Working knowledge of scripting languages like Unix Shell, Perl, TCL 7.Self-motivated, excellent time management, and able to work autonomously on resolving technical problems 8.Strong interpersonal and communication skills (prior AE experience is a plus) Preferred Experience 9.Pre-sales activity: Participates in technical benchmarks, methodology presentations, and demos to articulate the advantage of our solution 10.Post-sales support: Participates in customer tape-outs using Synopsys' products, as well as customer training and on-site support 11.Drives product improvements and innovation by bringing customer inputs and vision into Synopsys R&D 12.Provide skillset growth in customer relationship management Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability. At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.

The Job is for a first level management role in Custom Router R&D team of Synopsys Custom Compiler. In addition to manage and mentor 2-3 junior engineers, the candidate has to take technical responsibilities including feature development, code review, designing software architecture. To work with the broader team, he is expected to have good communication, coordination, and partnership skills. The expertise in EDA area is necessary and better to have physical design automation relating experience. * Qualifications: 1. MS/Ph.D. degree in Electrical Engineering, Computer Science 2. 5+ years of physical design related experience in EDA industry 3. Strong programming skills in C++/TCL/Python, proficient in data structure, 4. algorithm, large scale software development 5. Obsessed with creating clean code, but not hesitant about legacy code 6. Bright, willing to share and teach * Extra plus: Experience in developing EDA automation methodology and tools Familiar with advanced design rule and how the checking works Strong organizational skills for engineering projects Good communication and presentation skills

**重要**請務必投遞履歷至官網，連結如下 https://careers.synopsys.com/job/hsinchu/solutions-engineering-staff-engineer/44408/75484659232 As a Solution Engineer for the Synopsys Custom Designer product, you will enable customer flows and deploy Custom Design solutions for key customers. You will collaborate with R&D to define and drive the product direction by identifying designer needs and specifying tool capabilities for the next generation designs. You will be responsible to define the methodology, develop training, address customer issues, and provide experienced help to the Field. In addition, you will drive the requirements specifications and work closely with R&D on early-stage new feature development. ● BSEE/MSEE with 5+ years as a Design engineer and/or a CAD engineer working as part of a Custom IC Design team. ● Knowledge of the complete custom/mixed-signal design flow, custom and analog layout design is required. ● Familiarity with 3DIC, Custom IC core applications like Schematic-Drive Layout (SDL), Analog Placement and Routing, LVS/DRC, Extraction and Analog/Digital Co-design and Simulation Analysis is desired. ● Scripting skills (TCL, Perl, Python) required. Good communication skills and the ability to interface with customers are essential. Contributes to complex aspects of a project. Determines and develops approach to solutions. Work is self-supporting and collaborative in nature. Provides regular updates to manager on project status. Represents the organization on business unit and/or company-wide projects. Guides more junior peers with aspects of their job. Manages both pre-sale and post-sale technical staff and support activities including assessment of how company products meet customer needs and the preparation of product specifications for development and installation of customized applications/solutions. May provide pre-sale technical support in sales presentations and product demonstrations. Establishes and maintains lines of communication with design engineering on issues such as considerations for product reliability. Works with marketing and product managers to define new products and may provide insight from the field back to these groups. Selects, develops, and evaluates personnel to ensure the efficient operation of the function.

請務必透過官網投遞履歷: https://careers.synopsys.com/ Job description: We’re looking for a Application Engineer for top-tier foundry and key customer support, focusing on physical verification (DRC/LVS/PERC/Fill), product validation (Quality Assurance) and signoff solution enablement. In this role, you will learn and apply knowledge in areas of SoC physical design enablement, advance process effect, analysis and signoff. Primary Responsibilities include: * Work closely with top-tier foundry and key fabless company to deliver the most advanced physical verification solutions * Involve developing foundry process design kit (PDK) and validation methodology, working closely with R&D to develop methodologies to solve customer problems and to improve Synopsys tools and flows * Work with product-level R&D to drive new and improved technologies, methodologies and tool capabilities, and share and align on best practices. * Coordinate with and develop solid relationships with product R&D, end-user, and product manager Key Qualifications: * BS or MS degree in Electronic Engineering, Computer Science or similar. * Proficiency with at least one programming languages like Python, Tcl, Perl. * Experience with UNIX/Linux environment. * Familiarity with physical verification flows like DRC/LVS/PERC/FILL/DFM. * Understanding of complex layout/electrical design rules and layout of complex semiconductor devices would be a plus. * Prior knowledge and experience of tool/runset development/support is a plus. * Exceptional desire to learn, explore new technologies and demonstrate good investigation and problem-solving skills. * Capability to produce adequate technical documentation. * Has good communication skills and builds productive internal/external working relationships.

請在官網投遞履歷 (8191) We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a seasoned professional with a passion for tackling engineering challenges head-on. With a master’s degree in electrical engineering or computer science and over 3+ years of experience (or a bachelor’s degree with 6+ years of experience), you bring a wealth of knowledge in Circuit Design or CAD engineering. You have a strong grasp of analog simulation environments like PrimeWave or ADE and advanced flow methodologies. Your expertise extends to SPICE and RF simulation tools such as PrimeSim, HSPICE, and Spectre. Proficient in scripting languages like TCL and Python, you are adept at automating and optimizing processes. Your exceptional interpersonal, verbal, and written communication skills enable you to effectively collaborate with cross-functional teams and clients. You are driven by a passion for resolving complex engineering problems and thrive in a dynamic environment where innovation is key. What You’ll Be Doing: Enabling Analog & mixed signal simulation flows for internal and external customers. Collaborating with R&D, internal teams, and field application engineering teams to define and drive product direction. Identifying designer needs and specifying tool capabilities for next-generation analog designs. Supporting customers during benchmarks and suggesting appropriate flow solutions for analog and RF designs. Providing feedback to Synopsys R&D and product groups to drive product improvements. Participating in customer and field training sessions and preparing training materials. The Impact You Will Have: Enhancing the efficiency and effectiveness of simulation flows for analog and mixed signal designs. Driving product innovation by providing critical feedback and insights to R&D teams. Improving customer satisfaction by offering expert solutions and support during benchmarks and troubleshooting. Contributing to the development of next-generation analog design tools and methodologies. Fostering strong relationships with internal teams and external customers. Empowering customers through comprehensive training and support materials. What You’ll Need: 1.Master’s degree in electrical engineering or computer science with 3+ years of relevant experience, or a bachelor’s degree with 6+ years of experience. 2.Proficiency in analog simulation environments like PrimeWave or ADE. 3.Expertise in SPICE and RF simulation tools (PrimeSim, HSPICE, Spectre). 4.Strong scripting skills (TCL, Python). 5.Excellent interpersonal, verbal, and written communication skills. Who You Are: You are a dedicated and innovative engineer with a knack for problem-solving. Your ability to work collaboratively and communicate effectively makes you a valuable team player. You are passionate about pushing the boundaries of technology and are always eager to learn and grow. Your technical expertise is complemented by your strong analytical skills and your commitment to delivering high-quality solutions. The Team You’ll Be A Part Of: You will be part of the Technology & Product Development Group, working closely with R&D, internal teams, and field application engineering teams. Our focus is on enabling analog and mixed signal simulation flows, driving product direction, and solving complex technical challenges for analog and RF designs. We are committed to innovation and excellence, and we support each other in achieving our goals.

若有興趣者，請務必上傳英文履歷至官網,否則不予受理(職缺代碼9739): https://careers.synopsys.com/job/hsinchu/r-and-d-engineering-staff-engineer-zebu/44408/78181675440 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: A highly skilled engineer with a deep understanding of simulation, emulation, and compiler technologies. You bring extensive experience with HDL languages like Verilog and have previously worked with VCS and ZeBu platforms. Your proficiency in programming languages such as C/C++ is complemented by a strong grasp of data structures and algorithms, including graph theory. You excel in designing modular, scalable software architectures and optimizing software performance through multi-threading and operating system concepts. Your familiarity with version control systems like Perforce and Git enables you to manage code efficiently and collaborate seamlessly with other teams. You are an effective communicator, able to convey complex technical concepts clearly and work collaboratively in a dynamic environment. Your passion for technology drives you to stay updated with industry trends, and you actively mentor and guide junior engineers, fostering a culture of continuous learning and innovation. What You’ll Be Doing: 1.Designing and developing high-performance software for Synopsys' simulation and emulation platforms, including VCS and ZeBu. 2.Collaborating with cross-functional teams to enhance product capabilities and performance. 3.Conducting comprehensive research and analysis to address complex engineering challenges. 4.Leading project initiatives, ensuring timely and high-quality deliverables. Mentoring junior engineers and fostering a culture of continuous learning and innovation. 5.Integrating new technologies and staying abreast of industry trends to drive continuous improvement. The Impact You Will Have: 1.Enhancing the performance and reliability of emulation platforms used for cutting-edge silicon chips. 2.Driving the development of next-generation simulation and emulation tools. 3.Improving the usability and adoption of Synopsys products across various industries. 4.Contributing to a collaborative and innovative engineering culture within the team. 5.Advancing the future of technology and connectivity through continuous innovation. 6.Delivering high-quality, performance-optimized software solutions that elevate Synopsys' success. What You’ll Need: *CS or EE master's degree or above at least five of relevant experience. *Proficiency in programming languages: C/C++. *Strong understanding of data structures and algorithms, including graph theory. *Experience with hardware description languages like Verilog and scripting languages like TCL. *Prior experience with HDL simulation and emulation platforms, including VCS and ZeBu. *Familiarity with version control systems like Perforce and Git. *Ability to design and implement modular, scalable software architecture. *Proficiency in multi-threading and operating system concepts for software *performance optimization. Who You Are: A proactive and innovative thinker with a passion for technology. A collaborative team player who thrives in a dynamic environment. An effective communicator with strong interpersonal skills. A mentor and leader who inspires and guides junior engineers. A continuous learner who stays updated with industry trends and advancements.

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly skilled engineer with a passion for low power design and optimization. You have a strong background in low power methodologies, including UPF strategies, and are adept at working with various power estimation and analysis tools. With a comprehensive understanding of ASIC and FPGA design, you excel in using Verilog, System Verilog, and VHDL for design implementation. Your programming skills extend to languages like Python, TCL, and Perl, allowing you to develop scripts and tools that enhance automation and analysis processes. You are an excellent communicator, capable of working effectively with cross-functional teams and stakeholders. Your analytical and problem-solving skills set you apart, enabling you to deliver high-quality, power-efficient designs consistently. With at least 5 years of experience in the field, you are ready to take on new challenges and contribute to groundbreaking projects that push the boundaries of technology. What You’ll Be Doing: * Design and implement low power solutions for ASIC and FPGA designs using Verilog, System Verilog, and VHDL. * Develop and implement UPF strategies to reduce power consumption during various modes of operation. * Perform power analysis and optimization throughout the design cycle. * Work closely with design and verification teams to ensure power-efficient designs. * Collaborate with the physical design team for synthesis and PnR. * Create and maintain documentation of the low power design and optimization process. * Utilize programming languages such as Python, TCL, and Perl to develop scripts and tools for automation and analysis. * Communicate effectively with cross-functional teams and stakeholders to ensure timely delivery of high-quality designs. The Impact You Will Have: * Reduce power consumption in ASIC and FPGA designs, extending battery life and improving energy efficiency. * Enhance the performance and reliability of our products through advanced low power design techniques. * Support the development of cutting-edge technologies that drive innovation across various industries. * Ensure compliance with industry standards and customer requirements for low power design. * Contribute to the continuous improvement of design methodologies and tools. * Facilitate collaboration between design, verification, and physical design teams to achieve optimal power efficiency. What You’ll Need: * Bachelor's degree in Electrical Engineering or related field is preferred. * At least 5 years of experience in low power design and optimization is preferred. * Proficiency in UPF-related methodologies. * Experience with implementation tools such as synthesis and PnR. * Familiarity with power estimation and analysis tools such as PrimePower, PrimePower RTL, Spyglass Power, and Power Replay. * Strong programming skills in Verilog, System Verilog, and VHDL. * Experience in programming languages such as Python, TCL, and Perl is preferred. * Excellent English communication skills, both verbal and written, are preferred. * Excellent problem-solving skills. Who You Are: * A detail-oriented and analytical thinker with a strong problem-solving mindset. * A proactive and self-motivated individual who can work independently and as part of a team. * A clear and effective communicator, able to convey complex technical concepts to diverse audiences. * A collaborative team player who thrives in a dynamic and fast-paced environment. * An innovative thinker who is always looking for ways to improve and optimize designs.

請務必上官網投遞履歷: https://careers.synopsys.com/job/hsinchu/applications-engineering-sr-staff-engineer-3dic/44408/79881832112 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly skilled and experienced engineer with a passion for physical design and chip implementation. With a background in BCH, MST, or PHD and 7 to 15 years of relevant experience, you bring a deep understanding of physical design methodologies, including ICC2/FC or equivalent physical implementation tools. You have proficiency in place and route, STA (timing) signoff, and DRC/LVS. Your coding skills in Tcl, Perl, and/or Python for CAD engineering are highly desired, and your knowledge of RLC extraction, analog circuit simulation, and voltage drop or thermal analysis is a significant plus. Experience with 3DIC or multi-die package implementation, especially SoC integration, will set you apart. You excel in multi-tasking, collaboration, and communication within a global, multicultural environment. What You’ll Be Doing: 1.Work on the successful deployment, release, and support of advanced Synopsys EDA products and solutions. 2.Collaborate closely with internal engineers to develop methodologies to solve customer problems and improve Synopsys tools and flows. 3.Assist customers in applying Synopsys products to design and optimize complex chips and multi-chip systems. 4.Drive the latest capabilities of Synopsys tools and advanced semiconductor foundry IC packaging offerings. 5.Specify, develop, and test EDA tool flows in collaboration with end users, R&D, and AE teams. 6.Gather, refine, write, and track flow requirements based on user feedback, engineering judgment, and new tool capabilities. 7.Coordinate with product R&D, AE, end users, and product managers to drive new and improved flows, methodologies, and tool capabilities. The Impact You Will Have: 1.Enhance the performance and capabilities of Synopsys EDA products, driving technological innovation. 2.Improve customer experience by providing expert solutions and support for complex chip designs. 3.Contribute to the development of cutting-edge semiconductor technologies. Foster strong relationships between Synopsys and its customers, ensuring successful product deployments. 4.Drive continuous improvement in Synopsys tools and methodologies, keeping the company at the forefront of the industry. 5.Support the integration of advanced IC packaging solutions, enabling next-generation chip designs. What You’ll Need: 1.BCH, MST, or PHD with 7 to 15 years of relevant experience in physical design and chip implementation. 2.Proficiency in physical design methodology (ICC2/FC or equivalent), place and route, STA (timing) signoff, and DRC/LVS. 3.Expertise in Tcl, Perl, and/or Python for CAD engineering. 4.Understanding of RLC extraction, analog circuit simulation, and voltage drop or thermal analysis is a plus. 5.Experience with 3DIC or multi-die package implementation, particularly in SoC integration roles. Who You Are: 1.Adept at multitasking and managing multiple projects simultaneously. 2.Collaborative team player with excellent communication skills. 3.Detail-oriented and able to work independently with limited supervision. 4.Customer-focused, with a strong commitment to delivering high-quality solutions. 5.Innovative thinker who is always looking for ways to improve processes and methodologies.

Responsibility ● Responsible for new account development and/or expanding existing accounts within an established geographic territory/product line ● Collaboration with technical teams based on understanding of customer’s needs and requirements to promote Synopsys solutions Requirements ● Minimum of 5 years of experience in the semiconductor or EDA industry with 3 years of experience in sales. ● Bachelor's degree, preferably in Electrical or Computer Engineering (or related degree) Key Qualifications ● Self-motivated with leadership skills and a demonstrated passion to win ● A deep knowledge of IC design flows and methodologies ● The ability to drive engagements at management and technical levels that produce differentiated Synopsys results in addressing Customer’s key challenges ● Dedicated leadership, influencing, verbal and written communication skills ● Ability to travel as required ● Experience to develop new territory, new account is plus

Synopsys is a leading company for SRAM IP solution. You will be in worldwide largest SRAM circuit/compiler design department. Build design with schematic concept, run simulation and verifications t o achieve a best SRAM compiler delivery. We'd like to see below knowledge from you. What you’ll be doing • SRAM IC design and robustness verification • SRAM compiler design, gds tiling, netlist tiling • Characterization of SRAM timing, power/…. • Compiler quality assurance Requirements: • Requires Master's degree in Electrical/Electronic Engineering or a related field • Prior understanding of CMOS based block level Circuit design, SRAM architectures understanding is plus • Understanding Digital Circuit Design and VLSI Process Concepts is desired • Strong desires to learn and explore new technologies concepts • Demonstrates good analysis and problem-solving skill • Basic understanding of Scripting language like python, tcltk, Perl, Unix shell • 1~4+ years of experience in SRAM circuit design. • SRAM bitcell analysis and design criteria development • SP/2P/ROM variety design experience • Post-silicon debug experience is a plus • EDA tool usage for simulations and design, XA/hspice/Verilog/Starrc/EMIR tools

請上傳英文履歷至官網(職缺代碼12427): https://careers.synopsys.com/job/hsinchu/r-and-d-engineering-sr-staff-engineer/44408/84643890752 You Are: You are a passionate and inventive engineer eager to advance the state of semiconductor technology. With a strong foundation in device physics, circuit simulation, and programming, you excel at translating complex technical challenges into innovative solutions. What You’ll Be Doing: 1.Researching, designing, and implementing advanced semiconductor component models, supporting both mainstream and emerging technologies. 2.Collaborating with peer R&D teams to integrate new technologies into SPICE/FastSPICE products, driving performance optimization. 3.Partnering with industry leaders to develop custom modeling and characterization methodologies tailored to cutting-edge applications. 4.Working closely with teams specializing in parasitic extraction, standard cell library characterization, and related domains to create comprehensive solutions for emerging technologies. 5.Providing expert-level technical support and guidance to key and strategic customers, ensuring their success with Synopsys products. 6.Driving innovation by contributing to the development of reliability modeling and advanced analysis features within SPICE/FastSPICE simulation tools. 7.Participating in cross-functional teams to ensure seamless product integration and a best-in-class user experience. The Impact You Will Have: Accelerate the adoption of next-generation semiconductor technologies through state-of-the-art modeling and simulation capabilities. Enhance the performance and reliability of SPICE/FastSPICE simulation products, directly influencing the success of global semiconductor leaders. Empower customers to innovate faster and with greater confidence by providing robust, accurate, and scalable simulation solutions. Shape the future direction of Synopsys’ EDA offerings by contributing to groundbreaking feature development and integration. Strengthen Synopsys’ reputation as a trusted partner and technology leader within the semiconductor industry. Drive industry standards for device modeling, reliability analysis, and advanced circuit simulation methodologies. Foster an inclusive and collaborative culture, mentoring junior engineers and promoting best practices across the organization. What You’ll Need: 1.MS or PhD in Electrical Engineering, Computer Science, Physics, Material Science, Applied Statistics, or Applied Mathematics, with 3+ years of relevant industry experience. 2.Strong knowledge of device physics, semiconductor process, and manufacturing flows. 3.Proficiency in programming with Linux, C/C++, and Python; solid foundation in data structures and algorithms. 4.Hands-on experience in SPICE circuit simulation or the development of related EDA software products. 5.Familiarity with Memory, Analog, Digital, High Frequency, or RF device/circuit design (a plus). 6.Experience or interest in machine learning applications and reliability analysis methodologies (a plus). Who You Are: Exceptional communicator, able to explain technical concepts clearly to diverse audiences. Strong problem-solver with a can-do attitude and resilience in the face of technical challenges. Team player who thrives in collaborative, multicultural environments. Self-motivated, organized, and able to manage multiple priorities effectively. The Team You’ll Be A Part Of: You’ll join a world-class R&D team at the forefront of SPICE/FastSPICE circuit simulation technology. The team is dedicated to developing, innovating, and implementing new technologies for device and reliability modeling, as well as advanced analysis features. Working closely with other market-leading product teams and industry partners, you will contribute to cross-functional projects that drive Synopsys’ leadership in EDA solutions. Our team values collaboration, knowledge-sharing, and a commitment to excellence in all aspects of product development and customer support.

請務必投遞官網(12438): https://careers.synopsys.com/job/hsinchu/applications-engineering-staff-engineer-ic-validator/44408/84710683632 You Are: You are an innovative and resourceful engineer with a deep curiosity for solving complex technical challenges at the intersection of hardware and software. With a strong foundation in Electronic Engineering, Computer Science, or a related field, you are adept at leveraging your programming expertise—whether in Python, Tcl, Perl, or similar languages—to streamline and enhance engineering workflows. Your experience within UNIX/Linux environments equips you to navigate high-performance computing scenarios with ease. You thrive in collaborative, cross-functional teams and are energized by the opportunity to work closely with top-tier foundry partners and leading fabless companies. Your keen understanding of physical verification flows—such as DRC, LVS, PERC, FILL, and DFM—sets you apart, and you are eager to deepen your expertise in SoC physical design enablement, process effect analysis, and signoff. You are detail-oriented, capable of producing clear technical documentation, and communicate with clarity and empathy across diverse audiences. What You’ll Be Doing: 1.Delivering advanced physical verification solutions (DRC/LVS/PERC/Fill) for top-tier foundries and key fabless customers, ensuring high-quality silicon signoff. 2.Developing and validating process design kits (PDKs) and verification methodologies in collaboration with R&D and customer teams. 3.Partnering with R&D to innovate and improve Synopsys tools and flows, contributing to the evolution of physical verification technologies. 4.Providing hands-on customer support, troubleshooting issues, and delivering timely resolutions that enhance customer satisfaction and product adoption. 5.Coordinating with internal teams, including product managers and end-users, to align on best practices and ensure seamless integration of new technologies. 6.Documenting technical solutions, validation methods, and customer workflows for knowledge sharing and process improvement. 7.Staying up to date on industry trends and applying new insights to continuously optimize verification processes and tools. The Impact You Will Have: Accelerate the adoption and success of Synopsys physical verification products in leading-edge semiconductor manufacturing processes. Drive the development of robust PDKs and methodologies that enable customers to achieve first-time-right silicon. Enhance the quality and reliability of Synopsys verification tools through direct feedback and collaborative innovation with R&D teams. Strengthen Synopsys’ reputation as a trusted partner to top-tier foundries and fabless customers worldwide. Facilitate faster product cycles and reduced time-to-market for customers by delivering efficient and effective signoff solutions. What You’ll Need: BS or MS degree in Electronic Engineering, Computer Science, or a related field. Proficiency in at least one programming language, such as Python, Tcl, or Perl. Hands-on experience with UNIX/Linux environments and command-line tools. Familiarity with physical verification flows (DRC, LVS, PERC, FILL, DFM) and understanding of complex layout/electrical design rules. Strong investigative, analytical, and problem-solving abilities, with a passion for learning new technologies. Ability to produce clear, concise technical documentation and validation reports. Prior knowledge of tool/runset development/support and experience with SoC physical design is a plus.