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台北 02-2912-6104 轉 2
   02-7703-3104 轉 2
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廠商求才專線
台北 02-2912-6104
   02-7703-3104
台中 04-3700-6104
上海 86-21-50277104 轉 1
意見回饋

Digital IC Design Engineer

  • 全職

KaiKuTek is the world's leading provider for 3D gesture sensor using mmWave Radar with embedded AI accelerator.
We possess key technologies in areas such as Antenna-in-Package (AiP), ML algorithm, AI accelerator, as well as 60 GHz radar transceiver design.
With recent merger by JMicron, founded in 2001 and located in Hsinchu Science Park, our product portfolio expands to high speed SerDes bridge controller SOC's mainly in storage application utilizing USB, PCIe, and SATA.
This new sensing technology will change and redefine human-machine interface as we know today, and mmWave technology combined with high speed SerDes will open door to many new possibilities and application frontiers.
KaiKuTek is looking for enthusiastic digital IC design engineers willing to take upon new challenges of working closely with cross functional teams, including analog/RFIC designers, hardware engineers, software and firmware engineers, production and testing as well as marketing and FAE, to optimize the overall SoC performance in terms of power, area, functionality, testability as well as to create proof-of-concept for new customer engagement.

工作條件

  • 工作經歷: 三年以上
  • 學歷要求: 大學 碩士
  • 語文條件: 英文 -- 聽 /中等、說 /中等、讀 /中等、寫 /中等
  • 其它條件: Job Description:
    The selected candidate will have to handle RTL design implementation, simulation verification, and FPGA verification as well as handling SoC design flow.

    Job Requirements:
    Master degree in EE related engineering major is required as a minimum from a reputed college.
    Familiar with Verilog Design
    Familiar with Xilinx FPGA platform
    Familiar with SoC design flow, such as synthesis, DFT, STA, LEC, power analysis, etc…
    Written and verbal communication skills.
    Ability to profile the values, requirements, issues, risks, and solutions for engineering works.
    Fast-learner, motivated to work in startup environment.

    Skills in any of the following is a plus:
    Familiar with Machine Learning and AI accelerator.
    Familiar with fix point DSP architecture and algorithm design such as FIR, IIR, adaptive filter, FFT, AGC, etc…
    Familiar with RISC-V architecture.
  •  
  • 歡迎應屆畢業生、研發替代役、外籍人士

福利制度

◆ 獎金 / 禮品類
 1.年終/績效獎金
 2.生日聚餐
◆ 保險類
 1.職災保險
◆ 請 / 休假制度
 1.週休二日
 2.特休/年假
◆ 其他
 1.健康檢查
◆ 補助類
 1.結婚禮金
 2.生育津貼 

更新日期:2021-12-01

應徵方式

  • 職務聯絡人: 黃先生
  • 聯絡E-Mail: (請利用104履歷表應徵此工作) 我要應徵
  • 洽: 不接受電洽
  • 洽: 不接受親洽

應徵分析

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