求職服務專線
台北 02-2912-6104 轉 2
   02-7703-3104 轉 2
意見回饋
廠商求才專線
台北 02-2912-6104
   02-7703-3104
台中 04-3700-6104
上海 86-21-50277104 轉 1
意見回饋

ASIC/ECC DESIGN Engineer (Taipei)

  • 全職

• You will be involved in developing storage chipsets.
• The work requires participation in defining functional specifications with the ASIC architect and developing the design in Verilog.
• Support verification, circuit, and test groups throughout the design cycle and silicon bring up.
• Work with multi-disciplinary groups to ensure designs are delivered on time and with the highest quality by incorporating proper checks at every stage of the design flow.

工作條件

  • 接受身份: 上班族、應屆畢業生
  • 工作經歷: 不拘
  • 學歷要求: 專科以上
  • 語文條件: 不拘
  • 其它條件: **Minimum Qualifications**
    1. Hands on SOC/ASIC/IP development with proficiency in front-end tools (including logic simulator, lint, CDC, synthesis, Logic Equivalence Checker, formal and static timing analysis) and methodologies.
    2. RTL coding capability with Verilog (e.g. FSM, Data-Path/Control-Path Designs, etc..) that produces reasonable post-synthesis designs in terms of timing and area.
    3. Behavioral coding with System Verilog/Verilog.
    4. Strong problem solving, debugging, analytical skills.

    **Plus requirement**
    1. Hands on Experience in Error Correcting Code (ECC) Logic Design (LDPC preferred) or DSP Logic Design.
    2. Knowledge of NAND flash devices and SSD.
    3. Knowledge of design verification and scripting language such as PERL/TCL.

福利制度

法定項目

其他福利

◆ 獎金/禮品類
1.三節獎券/禮品
2. 專利獎金
3. 生日禮券
◆ 保險類
1.員工團保
2.眷屬團保
◆ 休閒類
1.每季部門聚餐
2.慶生會
3.員工旅遊
4. 每年定期舉辦員工健康檢查
◆ 制度類
1.伙食費
2.介紹獎金
◆ 請/休假制度
1.週休二日
2.優於勞基法特休/年假
3.不扣薪病假

更新日期:2021-09-13

應徵方式

  • 職務聯絡人: Joanne
  • 聯絡E-Mail: (請利用104履歷表應徵此工作) 我要應徵
  • 洽: 不接受電洽
  • 洽: 不接受親洽

應徵分析

兩週內0-5人應徵
經歷分佈
新鮮人50%
1~3年0%
3~5年50%
5~10年0%
10年以上0%
學歷分佈
碩士及以上100%
大學0%
專科0%
高中0%
高中以下0%
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