求職服務專線
台北 02-2912-6104 轉 2
   02-7703-3104 轉 2
意見回饋
廠商求才專線
台北 02-2912-6104
   02-7703-3104
台中 04-3700-6104
上海 86-21-50277104 轉 1
意見回饋

Digital ASIC Design Engineer

  • 全職

To strengthen and building up our new ASIC team in Hsinchu, Taiwan, we are looking for Digital ASIC Design Engineers who wants to make a difference and strengthen the development of Fingerprint’s sensor technology. You will report directly to the ASIC Manager/Project Manager in Hsinchu.

We offer you an exciting and challenging position together with friendly and professional colleagues. Work in an open and international environment, with products that are used every day.

What you will do
As a Digital ASIC Design Engineer, you will work in close cooperation with talented colleagues developing future sensor systems to meet future demands for fingerprint systems. You will develop Fingerprints sensor technology with focus on the digital ASIC parts. In the ASIC team you will get in touch and be involved in all aspects of ASIC development flow. From ASIC system design, RTL implementation, block and system level verification, synthesis & layout to GDSII and wafer production test.

As an engineer in the ASIC team, you will also participate in design reviews and creating the necessary design and product documentation. When needed, you will also participate in chip debugging and chip characterization.

At Fingerprint you will be given opportunities to be part of a team that is responsible for all aspect in HW design, a design that are used by millions every day. As a member in the design team you will have a large possibility to affect the work and the final product by your own ideas. You are also most likely to use your drive and commitment to implement your ideas together with your colleagues.

Who you are
To succeed at Fingerprints, you are a team player with a positive problem-solving attitude. You are curious and open to learn new things and are driven by a deep technical interest. Our open and creative environment requires you to be able to drive assignments independently and to self-manage priorities.

工作條件

  • 工作經歷: 三年以上
  • 學歷要求: 碩士以上
  • 語文條件: 英文 -- 聽 /中等、說 /中等、讀 /精通、寫 /精通
  • 其它條件: Qualifications & Experience
    • Master's degree in Computer Science, Electrical Engineering or equivalent scientific discipline
    • Good knowledge in digital ASIC/FPGA design and verification
    • RTL design in Verilog & VHDL
    • Design verification in System Verilog
    • Programming/scripting know-how, e.g. Python, TCL
    • Electrical measurement and test
    • Excellent English written & verbal communication skills

福利制度

【 健康保險】
◆ 勞保、健保、勞退提撥及團體保險
◆ 配偶及子女享團體保險福利
◆ 每年提供員工健康檢查 (開放眷屬自費參加)

【各類假期】
優於勞基法規定的年休假天數,其他法規定如下:
◆ 特休假:15天/年
◆ 健檢假:0.5天/年
◆ 全薪病假:10天/年

【員工福利】
◆ 年度Team building活動
◆ 良好的辦公環境及設備:咖啡機、氣泡水、各式飲品及豐富茶點
◆ 多樣化的員工活動: 慶生會、不定期員工聚餐、年終尾牙/抽獎

更新日期:2022-01-24

應徵方式

  • 職務聯絡人: 連先生
  • 聯絡E-Mail: (請利用104履歷表應徵此工作) 我要應徵
  • 洽: 不接受電洽
  • 洽: 不接受親洽
  • 它: This recruitment process is ongoing so please send in your application via our career page:
    https://www.fingerprints.com/open-positions/?jobid=120052

應徵分析

兩週內0-5人應徵
經歷分佈
新鮮人0%
1~3年0%
3~5年0%
5~10年0%
10年以上50%
學歷分佈
碩士及以上50%
大學0%
專科50%
高中0%
高中以下0%
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