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台北 02-2912-6104 轉 2
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台北 02-2912-6104
   02-7703-3104
台中 04-3700-6104
上海 86-21-50277104 轉 1
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IP Design and Verification Engineer

  • 全職

What you do at AMD changes everything
At AMD, we push the boundaries of what is possible. We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, Immersive platforms, and the data center.
Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results. It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world. If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.

IP Design and Verification Engineer

AMD's environment is fast paced, results oriented and built upon a legion of forward-thinking people with a passion for winning technology.
This is an extraordinary opportunity to work in an outstanding company like AMD - Join us!

THE ROLE:
It is a must that the candidate has one or more of the following experience/knowledge, such as X86/ARM/8051 architecture, AMBA(AXI/AHB/APB) bus, USB(3.0/2.0/1.1; HSIC/host/device/OTG) system, NAND Flash host controller/BCH/double-data-rate interface, PCI-E/PCI bus, low power design, clock generation and control, SD/eMMC host controller, SATA/SAS, Legacy IPs (SPI/SMBUS/ACPI/LPC/GPIO), General connectivity IPs (I2S/I2C/UART), Ethernet, JTAG, etc.

THE PERSON:
The candidate is expected to exhibit good verbal and written communication skills in both Chinese and English, specialized knowledge plus broad technical knowledge that facilitates integrative thinking, driving execution of quality and timely result, capability to solve complex, novel and no-recurring problems and decision-making on critical technical areas.

KEY RESPONSIBILITIES:
• Work with team members and apply current functional verification techniques to perform and improve pre-silicon verification quality and product Time to Market for Southbridge
• Provide the technical leadership to the DV team for the new Southbridge project
• Work independently on various DV tasks and providing technical guidance to the DV team.
• Be involved technically in the porting/creation of the DV environment for the new design, block and chip level test plan creation and implementation, coverage analysis, and regression cleanup

PREFERRED EXPERIENCE:
• Master in Electrical Engineering, Computer Science or related
• Good understanding on ASIC design verification flow
• RTL coding with Verilog/System Verilog and familiar with front-end design flow and C/C++ programming experiences
• Knowledge on Perl, OVL, SVA, SV, UVM, OVM, script programming etc.
• USB experiences is a plus

ACADEMIC CREDENTIALS:
MSEE with minimum of 6 years, or BSEE with minimum of 8 years experiences in digital ASIC/SOC design verification

LOCATION:
Hsinchu, Taiwan

AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers and will consider all applicants without regard to race, marital status, sex, age, color, religion, national origin, veteran status, disability or any other characteristic protected by law.

工作條件

  • 接受身份: 不拘
  • 工作經歷: 六年以上
  • 學歷要求: 大學以上
  • 語文條件: 英文 -- 聽 /精通、說 /精通、讀 /精通、寫 /精通
  • 其它條件: 未填寫

福利制度

獎金 / 禮品類
  1.年終獎金
  2.三節禮金/禮品
◆ 保險類
  1.勞保
  2.健保
  3.員工團保
  4.眷屬團保
  5.意外險
  6.職災保險
◆ 休閒類
  1.部門聚餐
◆ 制度類
  1.介紹獎金
  2.順暢的升遷管道
3.退休金、離職金制度
◆ 請 / 休假制度
  1.週休二日
  2.優於法定之特休/年假
  3.優於法定之陪產假
  4.不扣薪病假
  5.員工育嬰假
◆ 補助類
  1.員工停車位或停車補助
2.員工進修補助

更新日期:2021-05-12

應徵方式

  • 職務聯絡人: Shirley Chou
  • 聯絡E-Mail: (請利用104履歷表應徵此工作) 我要應徵
  • 洽: 不接受電洽
  • 洽: 不接受親洽
  • 它: AMD official website

應徵分析

兩週內0-5人應徵
經歷分佈
新鮮人0%
1~3年0%
3~5年0%
5~10年33%
10年以上67%
學歷分佈
碩士及以上100%
大學0%
專科0%
高中0%
高中以下0%
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