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台北 02-2912-6104 轉 2
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廠商求才專線
台北 02-2912-6104
   02-7703-3104
台中 04-3700-6104
上海 86-21-50277104 轉 1
意見回饋

Staff EE system engineer and chip architect (光感測晶片系統資深工程師/技術經理)

  • 全職

我們誠摯尋求一位對技術研發充滿熱情的專業人士。在光程研發團隊中,你將參與訂製一個完整的光感測晶片系統,從產品概念研討階段,晶片系統設計,測試環境開發,到最後產品量產,你將參與整個流程, 推動產品完全落地商業化。我們鼓勵創新、講求專業與速度,結合你的經驗與專業,共同成就公司下一代光感產品。
We are looking to hire a highly motivated engineer with a passion on technology research and development. Within Artilux's RD team, you will help deliver an ASIC system that powers our next generation of sensor and depth sensing products. You will provide great technical expertise to a group of hardware engineers in an innovative and fast-paced environment, with a focus on IC system design and verification. You will own and drive technical projects from the concept/planning stage through execution and closure.

Responsibilities
■ Participate the design and validation of complex ASIC systems for our current and future 3D sensing systems. Support test activity, system bring-up & validation in every level.
■ Collaborate with IC designers and other systems engineers to design a system meeting the needs of all stakeholders.
■ Work with x-functional team to ensure the system is properly interfaced with firmware and other system modules.
■ Top-to-bottom design, from architectural decisions down to low level board design with an emphasis on creating components as part of a complete optical sensing system.
■ Write specifications for analog and digital portions of integrated circuits.
■ Behavioral modeling to model and validate architectures and circuit blocks.
■ Run simulations to validate design and integration.
■ Define bench-top test plans and verify circuit performance.
■ Testing and debugging chips after they return from fabrication.

工作條件

  • 接受身份: 上班族
  • 工作經歷: 五年以上
  • 學歷要求: 碩士以上
  • 語文條件: 不拘
  • 其它條件: ■ Minimum Qualifications
    - Education: PhD or MSEE with 2+ years in related area of expertise
    - Experience in system design and simulation using C or MATLAB
    - Familiarity with mixed-signal design and verification
    - Significant familiarity with low-power designs

    ■ Preferred Qualifications
    - Familiarity with Cadence or Mentor Graphics tools for analog design and simulation.
    - Familiarity with band-gap references, bias circuits, amplifiers, switched-capacitor circuits, LDOs, feedback and compensation techniques.
    - Experience with oscilloscopes, FPGAs, microcontrollers, signal generations, and other test equipment for validation and testing of analog and mixed-signal designs.
    - Experience in optical sensing product design is a strong plus.

福利制度

• 彈性上下班時間
• 優於法令規定的年度休假/全薪病假
• 年度健康檢查補助
• 員工團體保險
• 園區健身房費用補助
• 公司停車位承租費用補助
• 特約商店消費優惠
• 部門聚餐活動與慶生會
• 員工一日遊活動
• 舒壓按摩服務
• 員工認股計畫

更新日期:2021-02-25

應徵方式

  • 職務聯絡人: ArtiluxHR
  • 聯絡E-Mail: (請利用104履歷表應徵此工作) 我要應徵
  • 洽: 不接受電洽
  • 洽: 不接受親洽

應徵分析

兩週內0-5人應徵
經歷分佈
新鮮人0%
1~3年0%
3~5年0%
5~10年0%
10年以上100%
學歷分佈
碩士及以上100%
大學0%
專科0%
高中0%
高中以下0%
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