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台北 02-2912-6104
   02-7703-3104
台中 04-3700-6104
上海 86-21-50277104 轉 1
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Design Engineer (Memory Modeling Portfolio)

  • 全職

請至Cadence官網投遞履歷:
https://cadence.wd1.myworkdayjobs.com/en-US/External_Careers/job/SHANGHAI/Principal-Design-Engineer---Memory-Modeling-Portfolio_R32154

Position Requirements:
Responsible for scheduling, designing, developing, and supporting IP models of system level memory such as SDRAM (LPDDRx, HBMx), NAND Flash (ONFI/QSPI/OSPI/SPI NAND), eMMC, SD Card, DFI PHY, and UFS models for use on hardware based verification products.
Also responsible for updating, maintaining, documenting, and supporting existing system level memory model products.
Perform as individual contributor for RTL design, verification, productizing, and documentation of memory IP.
Interface with internal and external customers to work on diverse problems and solutions related to emulation, simulation, or verification.
Perform as team member toward cross verification of and cross training in memory IP as well as in developing and using lifecycle processes to ensure product quality.

Essential:
The position requires BSEE, or equivalent, with a minimum of 4 yrs of industry experience in designing hardware systems.
Must have excellent communication skills with both written and spoken English.
RTL design knowledge using Verilog/SystemVerilog is required along with experience using RTL verification tools and flows.
Debugging experience.
Experience with team-wide collaboration tools and process.
Drive and ability to schedule workload and plan own tasks effectively.


Strongly recommended:

Verification experience using Cadence simulation and/or emulation products is highly desired. Programming experience with scripting languages like Perl, TCL, C-shell is strongly recommended.
Experience in memory sub-system design and operation is strongly recommended.

工作條件

  • 接受身份: 上班族
  • 工作經歷: 不拘
  • 學歷要求: 碩士以上
  • 語文條件: 英文 -- 聽 /精通、說 /精通、讀 /精通、寫 /精通
  • 其它條件: 未填寫

福利制度

1) 高額員工團體保險
2) 端午節、中秋節及生日禮券(兼職除外)
3) 每年定期員工健康檢查及生育津貼(兼職除外)
4) 員工股票認購計劃(兼職除外)
5) 旅遊補助(兼職除外)
6) 社團活動補助 (兼職除外)
7) 優於勞基法之休假制度(兼職除外)

更新日期:2021-05-11

應徵方式

  • 職務聯絡人: HR
  • 聯絡E-Mail: (請利用104履歷表應徵此工作) 我要應徵
  • 洽: 不接受電洽
  • 洽: 不接受親洽
  • 它: 請至Cadence官網投遞履歷:
    https://cadence.wd1.myworkdayjobs.com/en-US/External_Careers/job/SHANGHAI/Principal-Design-Engineer---Memory-Modeling-Portfolio_R32154

應徵分析

兩週內0-5人應徵
經歷分佈
新鮮人0%
1~3年0%
3~5年0%
5~10年0%
10年以上100%
學歷分佈
碩士及以上100%
大學0%
專科0%
高中0%
高中以下0%
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