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台北 02-2912-6104 轉 2
   02-7703-3104 轉 2
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廠商求才專線
台北 02-2912-6104
   02-7703-3104
台中 04-3700-6104
上海 86-21-50277104 轉 1
意見回饋

Solution Architecture Division - CPU Solutions and Debug Manager

  • 全職

Responsibilities:
1. Act as a trusted CPU hardware consultant to customers
2. Offer appealing solutions to customers
3. Give Andes processor training courses to customers
4. Resolve customers' technical issues
5. Power user of Andes processor and SoC platform IP products
6. Enhance Verilog simulation, logic synthesis, and FPGA prototype flows in product packages
7. Write technical tutorials
8. Generate PPA (Power, Performance, and Area) on 7 ~ 130 nm process nodes
9. Improve product feature offerings by providing customer feedback to internal cross-functional teams.

工作條件

  • 工作經歷: 四年以上
  • 學歷要求: 碩士以上
  • 語文條件: 英文 -- 聽 /中等、說 /中等、讀 /中等、寫 /中等
  • 工作技能: 數位晶片產品開發、數位電路驗證
  • 其它條件: Minimum qualifications:
    1. Master's degree in Computer Engineering, Computer Science, Electrical Engineering or equivalent practical experience
    2. Experience working with Verilog or SystemVerilog.


    Preferred qualifications:
    1. Excellent analytical skills and creative problem-solving
    2. Excellent communication skills
    3. Ability to quickly learn, understand and work with new products, technologies and solutions
    4. Experience in CPU design or verification with Verilog
    5. Experience in SoC design integration or verification with Verilog
    6. Experience with ASIC/FPGA logic synthesis/implementation design flows
    7. Experience with scripting languages, Perl or Python
    8. Experience with C, C++, or assembly languages
  •  
  • 歡迎原住民【相關法令

福利制度

◆ 獎金/禮品類
1.年終獎金
2.三節獎金/禮品
◆ 保險類
1.勞保
2.健保
3.員工團保
4.眷屬團保
5.意外險
6.職災保險
◆ 休閒類
1.國內旅遊
2.部門聚餐
3.慶生會
4.社團活動
◆ 制度類
1.員工制服
2.績效獎金
3.完整的教育訓練
4.順暢的升遷管道
◆ 請 / 休假制度
1.週休二日
2.特休/年假
3.陪產假
4.女性同仁生理假
5.育嬰假
◆ 其他
1.健康檢查
2.特約商店
◆ 補助類
1.生育津貼
2.停車費補助
3.勞退金提撥
4.伙食津貼

更新日期:2022-01-20

應徵方式

  • 職務聯絡人: HR
  • 聯絡E-Mail: (請利用104履歷表應徵此工作) 我要應徵
  • 洽: 不接受電洽
  • 洽: 不接受親洽

應徵分析

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