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台北 02-2912-6104 轉 2
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台北 02-2912-6104
   02-7703-3104
台中 04-3700-6104
上海 86-21-50277104 轉 1
意見回饋

Physical Design Automation Engineer

  • 全職

SiFive is an idea-to-silicon company founded by the inventors of RISC-V to simplify the design and production of custom SoCs.

As the leading commercial provider of RISC-V processor IP, SiFive is on a mission to help engineers design custom chips for domain-specific solutions for many markets, including 5G, edge AI, enterprise networking, storage, and consumer devices.

Industry-leading innovators, including six of the top ten semiconductor companies, are working with SiFive thanks to our proven success, deep expertise, and rich partner ecosystem. With SiFive’s rich IP ecosystem and accessible design platform, every market has access to the development of workload-focused hardware needed to design next-generation products.

As a Physical Design Automation Engineer in the Implementation team, you will contribute to the development of industry-leading CPU IP to support the SiFive vision of enabling chip design by anyone. We are looking for people who are as excited as we are about working in a fast-paced dynamic environment to bring new hardware IP to market quickly, with high quality and exceptional performance. 

Responsibilities:

- Develop automation to improve the productivity of Physical Design and RTL Engineers;
- Implement and optimize our broad portfolio of RISC-V CPU's from RTL to GDSII;
- Close aggressive performance, power, and area (PPA) goals at block and/or CPU level;
- Collaborate with the microarchitecture and RTL teams to optimize PPA trade off's.

工作條件

  • 接受身份: 上班族、應屆畢業生、外籍人士
  • 工作經歷: 三年以上
  • 學歷要求: 大學以上
  • 語文條件: 英文 -- 聽 /精通、說 /精通、讀 /精通、寫 /精通
  • 工作技能: 軟體工程系統開發、軟體程式設計、韌體程式設計、數位電路分析設計、數位電路驗證
  • 其它條件: Requirements:

    - 3+ years of physical design and automation experience; Experience with CPU designs and advanced process nodes (16nm and below) is a plus;
    - TCL and Python scripting;
    - Experience in synthesis, DFT insertion, floor planning, place and route, clock tree synthesis, static timing, power analysis, and signal and power integrity;
    - Knowledge and skill in optimizing PPA through floor planning, placement and timing constraints, useful skew, and similar techniques;
    - Attention to detail and a focus on high-quality design;
    - Ability to work well with others and a belief that engineering is a team sport;
    - Bachelor’s degree in Electrical Engineering or Computer Engineering, Master’s preferred.

福利制度

法定項目

其他福利

SiFive is proud to be an equal employment opportunity workplace. We offer a competitive compensation package that includes flexible paid time off, health benefits, employee stock option program, and much more.

In addition to these, we provide regional benefits including team-building events, annual physical examination, and education reimbursement for the employees in Taiwan.

We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation.

If you yearn to be challenged and wish to work in an environment where the boundaries of your creativity and skills will be tested, then SiFive is the place for you.

更新日期:2021-10-23

應徵方式

  • 職務聯絡人: Grace Chen
  • 聯絡E-Mail: (請利用104履歷表應徵此工作) 我要應徵
  • 洽: 不接受電洽
  • 洽: 不接受親洽
  • 它: Please attach the latest English resume to your application. Thanks!

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