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台北 02-2912-6104 轉 2
   02-7703-3104 轉 2
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廠商求才專線
台北 02-2912-6104
   02-7703-3104
台中 04-3700-6104
上海 86-21-50277104 轉 1
意見回饋

Platform Debug / Validation Engineers

  • 全職

Job Description

▪ The Platform Architecture, Integration, and Validation org located within Intel's Data Platform Group (DPG) is responsible for the validation and verification of DPG's next-generation Xeon platforms. Responsibilities include enabling and validating new platform technologies, including key interconnects such as Memory, PCI Express, and CXL Compute Express Link, etc.
▪ We are looking for a capable Platform Validation and Debug Engineer with a thorough working knowledge of platform debug approaches to help us with our Xeon Platform validation efforts.
▪ In this role, you will help deliver and ensure a quality end-to-end solution and a positive experience for our customers.
▪ You will be responsible for the development, creation, and new test content execution of validation plans, as well as debug of issues that arise.
▪ You will help setup and config systems in the lab to enable testing and hands-on debug.
▪ You will work with both internal and external validation teams.
▪ You will bring your understanding of debug and/or validation practices to help solve challenging platform issues, we are looking for someone that will be hands-on, is comfortable getting in the lab, and who is interested in using state of the art debug and test equipment to help discover and drive resolution to key issues.
▪ If you enjoy solving technical problems and like challenging yourself with leading-edge technology, we are interested in hearing from you.

工作條件

  • 接受身份: 上班族
  • 工作經歷: 五年以上
  • 學歷要求: 大學以上
  • 語文條件: 英文 -- 聽 /精通、說 /精通、讀 /精通、寫 /精通
  • 其它條件: Qualifications

    ▪ You must possess the minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Relevant experience can be obtained through schoolwork, classes, and project work, internships, military training, and/or work experience.

    Minimum Qualifications

    ▪ 5 years of validation or debug experience with a BSEE or related degree (3 years with a Master's Degree) will also be considered.
    ▪ Experience must also be inclusive of platform validation and/or debug experience.
    ▪ Familiarity with debug tools (such as, but not limited to: protocol analyzers, exercisers, logic analyzers, O-scope, etc.)
    ▪ Ability to work directly with external customers.
    ▪ Ability to clearly communicate in Mandarin and English both written and verbal.

    Preferred Qualifications

    ▪ Intel Architecture and Server Platform experience.
    ▪ Experience in microcontroller debug experience on CPU,PCH pre or post Silicon
    ▪ Experience with Python.

福利制度

In addition to a challenging and interesting work environment, Intel offers a benefits and compensation package that goes well beyond base salary. Below are some of our unique benefits and compensation programs. Please note that the benefits and compensation programs within Asia Pacific Sales and Marketing may vary somewhat as they are tailored to meet the needs of our employees in their own countries.

http://www.intel.com/jobs/apac/bencomp/

更新日期:2021-10-22

應徵方式

  • 職務聯絡人: Talent Acquisition
  • 聯絡E-Mail: 未填寫 我要應徵
  • 洽: 不接受電洽
  • 洽: 不接受親洽
  • 它: Please directly send your latest English resume to winnie1.hsu@intel.com

應徵分析

兩週內0-5人應徵
經歷分佈
新鮮人0%
1~3年0%
3~5年0%
5~10年33%
10年以上67%
學歷分佈
碩士及以上100%
大學0%
專科0%
高中0%
高中以下0%
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