求職服務專線
台北 02-2912-6104 轉 2
   02-7703-3104 轉 2
意見回饋
廠商求才專線
台北 02-2912-6104
   02-7703-3104
台中 04-3700-6104
上海 86-21-50277104 轉 1
意見回饋

Product Development Engineer – Process Technology Integration (117922)

  • 全職

THE ROLE:
The Process Technology Integration will interface with our foundry partner’s process integration teams in order to drive yield, performance and reliability for our high-volume CPU/GPU/APU manufacturing at the latest foundry nodes. You will need to drive deeper engagement with the foundry to better understand their process, analyze the results of experiments and evaluations run at the foundry, help make the right decisions jointly in terms of evaluating and implementing process improvements, as well as provide the necessary technical inputs to other AMD teams across physical design, foundry operations, yield, product engineering, quality and reliability teams. This role will require you to interact closely with the foundry (across multiple fabs/nodes) and various global AMD teams.

THE PERSON:
You should have a passion for process technology and the desire to work at the cutting edge to make great products. You will need to “think like a process integration technologist” and influence the foundry and AMD global teams to make the right technology decisions for manufacturing AMD products. You should also be comfortable in data analysis of sort & WAT data from the foundry.

KEY RESPONSIBILITIES:
• Your role will span the areas across the process flow i.e. FEOL, MEOL & BEOL integration respectively. FEOL/MEOL/BEOL Process Technology Integration: Provide expertise in process and integration for advanced FEOL/MEOL/BEOL process integration loops as below.
o Isolation/fin/channel, epi/source-drain, spacer, gate stack and patterning.
o Replacement metal gate, Vt tuning, silicide and contact formation to active and gate.
o BEOL multi-patterning, full-stack (1x/2x/4x…) metal and via integration for trench-first and via-first integration schemes. Ability to work closely with bump/packaging and die-stacking/TSV teams building upon BEOL stacks.
• Hands-on product yield analysis (hardbin, softbin & parametric data) as well as foundry WAT parameter analysis. Ability to carry out deeper product analysis including bitmap and scan diagnostics (training will be provided for in-house tools).
• Detailed review of systematic defect and parametric signatures with the foundry, and oversight of process issues across products and technology nodes.
• Jointly design and analyze process improvement (CIP/BKM) evaluations run at the foundry. Provide technical assessment for AMD process change review board for CIP/BKM roll-out decisions.
• Close collaboration with device analysis teams to understand structural and parametric fail mechanisms for yield loss, potential reliability and quality issues, and deduce process failure mechanisms.
• Interface with supplier quality & reliability engineering teams to provide technical inputs for potential process excursions/material review board, as well as to assess the root cause of reliability/HTOL fails and drive the right corrective actions in the process flow with the foundry.

PREFERRED EXPERIENCE:
• Professional experience with any advanced semiconductor technologies (FinFET technology nodes preferred) such as 16/14/12/10/7/5nm …
• Desired experience: good overall knowledge of FEOL, MEOL & BEOL integration as well as deeper hands-on experience in unit process modules and/or process integration:
o FEOL: Diffusion/ ALD/ epi/ implant/ cleans/ litho/ FEOL etch/ RIE and FEOL integration loop such as multi-patterning/SADP, isolation/fin, epi/source-drain, spacer, gate stack and patterning.
o MEOL: ALD/ CVD/ PVD/ Litho/ RIE/ ALE/ RTA/ CMP and MEOL integration loop such as multi-patterning/ SADP/ LELE, replacement metal gate, Vt tuning, silicide and contact formation to active and gate.
o BEOL: Litho/ etch/ RIE/ PVD/ plating/ CVD/ CMP and BEOL integration loop such as metal/ via double patterning/ SADP/ LELE, trench-first and via-first integration schemes.
• Knowledge of PFA and FI techniques used in Device Analysis, including the ability to deduce fail mechanisms

工作條件

  • 工作經歷: 十年以上
  • 學歷要求: 大學以上
  • 語文條件: 英文 -- 聽 /精通、說 /精通、讀 /精通、寫 /精通
  • 其它條件: 未填寫
  •  
  • 歡迎外籍人士、原住民【相關法令】、二度就業、中壯齡(45~54歲)、中高齡(55~64歲)、高齡(65歲以上)、更生人

福利制度

獎金 / 禮品類
  1.年終獎金
  2.三節禮金/禮品
◆ 保險類
  1.勞保
  2.健保
  3.員工團保
  4.眷屬團保
  5.意外險
  6.職災保險
◆ 休閒類
  1.部門聚餐
◆ 制度類
  1.介紹獎金
  2.順暢的升遷管道
3.退休金、離職金制度
◆ 請 / 休假制度
  1.週休二日
  2.優於法定之特休/年假
  3.優於法定之陪產假
  4.不扣薪病假
  5.員工育嬰假
◆ 補助類
  1.員工停車位或停車補助
2.員工進修補助

更新日期:2022-01-20

應徵方式

  • 職務聯絡人: Chou
  • 聯絡E-Mail: (請利用104履歷表應徵此工作) 我要應徵
  • 洽: 不接受電洽
  • 洽: 不接受親洽
  • 它: AMD official website - Req#117922

應徵分析

兩週內11-30人應徵
經歷分佈
新鮮人0%
1~3年0%
3~5年0%
5~10年8%
10年以上92%
學歷分佈
碩士及以上75%
大學25%
專科0%
高中0%
高中以下0%
一零四資訊科技享有網站內容著作權 © 2001- 2022 104 Corporation All Rights Reserved