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數位IC設計工程師 軟體設計工程師的工作機會

49 筆查詢結果

Design Verification Engineer

FULL_TIME
新竹市
創意電子股份有限公司
  • 大學 碩士
  • 一年以上工作經驗
  • 待遇面議
※Job Contents: 1. Digital Design Verification 2. Work with digital design team to define verification plan . 3. Develop in house VIP 4. Use standard protocol VIP 5. Verify RTL design ※Requirements: 1. Familiarity with OOP , has design patter knowledge is plus 2. Familiarity with Systemverilog , has UVM experience is plus 3. Experience in IP verification 4. VIP use Experience
5天以前更新 兩週內0-5人應徵
2021-11-30
創意電子股份有限公司
  • 大學 碩士
  • 三年以上工作經驗
  • 待遇面議
※Job Contents: 1.Responsible for physical design flow development including APR, SI, IR, CTS, timing closure methodology development, flow automation 2. Project support/execution & collaboration with EDA vendors 3. APR flow/scripts/environment development for advanced process nodes ※Requirements: 1.Experience in APR, hierarchical design flow 2.Experience in physical design project execution 3.Fam
6天以前更新 兩週內0-5人應徵
2021-11-29
創意電子股份有限公司
  • 大學以上
  • 工作經驗不拘
  • 待遇面議
※Job Contents: SoC/Subsystem design : Job includes spec study, architecting, RTL coding, simulation, debugging, Lint, CDC, synthesis, LEC, SDC, STA and FPGA verification. ※Job Requirements: 1. MS or PhD degree in EE, CS, or relevant fields 2. Good at digital IC front-end design flow such as Verilog/VHDL RTL design, Synopsys Design compiler, LEC, PrimeTime STA and FPGA 3. Experience in chip integr
6天以前更新 兩週內0-5人應徵
2021-11-29

AI/ML EDA Engineer

FULL_TIME
新竹市
創意電子股份有限公司
  • 大學以上
  • 一年以上工作經驗
  • 待遇面議
※Job Contents: 1. Responsible for RTL to GDSII design flow development and automation with machine learning technique. 2. Project support/execution & collaboration with EDA vendors and academic. 3. Design flow/scripts/environment development for advanced process nodes. ※Requirements: 1. Experience in EDA design flow 2. Knowledge with script and programming (TCL/Perl/...) skills 3. Knowledge with
6天以前更新 兩週內0-5人應徵
2021-11-29

DFT EDA Engineer

FULL_TIME
新竹市
創意電子股份有限公司
  • 專科以上
  • 工作經驗不拘
  • 待遇面議
※Job Contents: 1. Responsible for IC DFT design methodology development and project support. 2. Flow development for Memory BIST, Scan, Boundary Scan, ATPG and so on. 3. In house EDA utility development ※Requirements: 1. MS in Electronic engineer or Computer science 2. Experience in DFT flow development (Memory BIST/BISR, SCAN, Boundary Scan, ATPG, Logic BIST, etc) 3. Experience in low power flow
6天以前更新 兩週內0-5人應徵
2021-11-29
創意電子股份有限公司
  • 碩士以上
  • 工作經驗不拘
  • 待遇面議
Front-End EDA Engineer ※Job Contents: 1. Responsible for IC front-end design methodology development and project support. 2. Flow development for lint, constraint check, synthesis, STA, power analysis and so on. 3. In house EDA utility development ※Requirements: 1. MS in Electronic engineer or Computer science 2. Experience in R2N flow development (lint/constraint check/synthesis/STA/Simulation/f
6天以前更新 兩週內6-10人應徵
2021-11-29
創意電子股份有限公司
  • 專科以上
  • 四年以上工作經驗
  • 待遇面議
※Job Contents: 1.Took responsibility of creating SDC for the complex SoC. 2.Took responsibility of timing analysis with customer. 3.Took responsibility of planning low-power structure and review flow (CPF/UPF). 4.Supported back-end team in post-layout timing closures 5.Supported project team in central tech-library management 6.Run EDA-Tool and GUC in-house design kit. ※Requirements: 1.Familiar
6天以前更新 兩週內0-5人應徵
2021-11-29

Software Engineer

FULL_TIME
新竹市
創意電子股份有限公司
  • 碩士以上
  • 五年以上工作經驗
  • 待遇面議
※Job Contents: 1. IP verification for SOC integration 2. IP driver porting/coding on Linux/RTOS ※Requirements: 1.碩士以上,電機電子/資工系所佳 2.Experience on Ethernet IP driver and network software stack porting/development 3.Experience on U-Boot and Linux porting to a new SoC
6天以前更新 兩週內6-10人應徵
2021-11-29
創意電子股份有限公司
  • 大學以上
  • 工作經驗不拘
  • 待遇面議
※Job Contents: 1.Took responsibility of creating SDC for the complex SoC. 2.Took responsibility of timing analysis with customer. 3.Took responsibility of planning low-power structure and review flow (CPF/UPF). 4.Supported back-end team in post-layout timing closures 5.Supported project team in central tech-library management 6.Run EDA-Tool and GUC in-house design kit. ※Requirements: 1.Familiar
6天以前更新 兩週內0-5人應徵
2021-11-29
創意電子股份有限公司
  • 專科以上
  • 五年以上工作經驗
  • 待遇面議
※依學經歷核定職稱 ※Job Contents: 1. Perform Netlist-to-GDS design flow, including floorplanning, placement, timing optimization, clock tree synthesis and routing. 2. Support STA timing analysis and fixing 3. Perform physical verification, including DRC, LVS, IR drop and DFM analysis. ※Requirements: 1. Familiar with Cadence Innovus or Synopsys ICC2/Fusion Compiler. 2. TOEIC 730~855 is preferred. 3
6天以前更新 兩週內0-5人應徵
2021-11-29
創意電子股份有限公司
  • 專科以上
  • 工作經驗不拘
  • 待遇面議
職缺1 - Chip Application Front-End Engineer ※Job Contents: 1. Timing closure. 職缺2 - DFT Design Engineer ※Job Contents: 1. DFT Planning of MBIST/SCAN for whole chip. 職缺3 - APR Engineer ※Job Contents: 1. Perform Netlist-to-GDS design flow, including floorplanning, placement, timing optimization, clock tree synthesis and routing. ※ 歡迎新鮮人投遞履歷 ※ ※ 指導者引導帶領 ※ ※ 先進製程技術相關專
6天以前更新 兩週內11-30人應徵
2021-11-29
創意電子股份有限公司
  • 大學 碩士
  • 工作經驗不拘
  • 待遇面議
※Job Contents: 1. Develop 2.5D/3D-IC multi-die stacking design flow for TSMC CoWoS, InFO, SoIC advanced technology 2. Deploy and enhance 2.5D/3D-IC physical design flow in real design with performing 3D multi-die stacking tasks: die-stacking configuration, floorplanning, layout, and die-to-die auto-routing 3. Develop 2.5D/3D-IC extraction signoff flow to ensure signal and power integrity 4. Design
6天以前更新 兩週內6-10人應徵
2021-11-29
創意電子股份有限公司
  • 大學 碩士
  • 三年以上工作經驗
  • 待遇面議
DFT Technical Manager ※Job Contents: 1.工作地點:台南 2.Communicate with customers to provide suitable test architecture planning for production. 3.Communicate with external teams to keep track of issues and progress. 4.Managing schedules and supporting cross-functional engineering effort. 5.Assist DFT structure implementation and review team members' work. 6.Working with test engineers to bring
6天以前更新 兩週內0-5人應徵
2021-11-29

Front-End EDA Engineer

FULL_TIME
新竹市
創意電子股份有限公司
  • 大學 碩士
  • 工作經驗不拘
  • 待遇面議
※Job Contents: 1. Responsible for IC frontend design methodology development and project support. 2. Flow development for lint, constraint check, synthesis, STA, power analysis and so on. 3. In house EDA utility development ※Requirements: 1. MS in Electronic engineer or Computer science 2. Experience in R2N flow development (lint/constraint check/synthesis/STA/Simulation/formal etc) 3. Experience
6天以前更新 兩週內0-5人應徵
2021-11-29
創意電子股份有限公司
  • 大學 碩士
  • 工作經驗不拘
  • 待遇面議
※依學經歷核定職稱 1.Develop power and IR verification methodology to ensure chip power integrity. 2.Perform IR verification, including power calculation, IR drop and EM analysis, and library power modeling. 3.Develop design flow to analyze the quality of power delivery network, including power grid, bump assignment, and chip-package co-design. 4.Support power network improvement. Job Requirements
6天以前更新 兩週內0-5人應徵
2021-11-29
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