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2027 筆查詢結果

DFT Engineer

FULL_TIME
新竹縣竹北市
聯詠科技股份有限公司
  • 大學以上
  • 二年以上工作經驗
  • 待遇面議
1.Development and implementation for advanced at speed testing and DFT, JTAG, MBIST, SCAN Chain and ATPG. 2.Requirement: 2-1. BS or MS degree in EE or related. 2-2. Familiar with DFT related flow and EDA tools 2-3. Experience in Logic simulation flow (e.g. Cadence NCVerilog or Synopsys VCS). 2-4. Experience in chip design flow and chip implementation flow is a plus. 2-5. Proficient in Tcl a
6天以前更新 兩週內6-10人應徵
2021-10-22
台灣超捷國際股份有限公司
  • 碩士以上
  • 三年以上工作經驗
  • 待遇面議
Job Description: • The Wireless Solutions Group (WSG) is seeking a Senior Design Engineer with Front End and DFT Implementation expertise to support IP/SOC development for our next generation, mixed signal, wireless products. The role will include driving and optimizing synthesis, implementing DFT circuits, power optimization, static timing analysis, and design verification using an industry leadi
一週以前更新 兩週內0-5人應徵
2021-10-20
聯發科技股份有限公司
  • 碩士
  • 四年以上工作經驗
  • 待遇面議
CPU Implementation/Design
2天以前更新 兩週內0-5人應徵
2021-10-26

DFT/BIST Engineer

FULL_TIME
新竹市
美商賽發馥股份有限公司臺灣分公司
  • 大學以上
  • 五年以上工作經驗
  • 待遇面議
SiFive is an idea-to-silicon company founded by the inventors of RISC-V to simplify the design and production of custom SoCs. As the leading commercial provider of RISC-V processor IP, SiFive is on a mission to help engineers design custom chips for domain-specific solutions for many markets, including 5G, edge AI, enterprise networking, storage, and consumer devices. Industry-leading innovators
5天以前更新 兩週內0-5人應徵
2021-10-23

DFT Engineer

FULL_TIME
新竹市
澳門商江左盟科技有限公司台灣分公司
  • 大學以上
  • 三年以上工作經驗
  • 待遇面議
1. Flow development for Memory BIST, Scan, Boundary Scan, ATPG and so on. 2. Familiar with DFT related flow and EDA tools 3. Experience in Logic simulation flow (e.g. Cadence NCVerilog or Synopsys VCS). 4. Experience in chip design flow and chip implementation flow is a plus. 5. Proficient in Tcl and Unix shell.
一個月以前更新 兩週內0-5人應徵
2021-09-10
台灣超捷國際股份有限公司
  • 大學 碩士
  • 工作經驗不拘
  • 待遇面議
Job Description: In this position, you will be responsible for all the DFT related matters in Microchip’s Wireless SoC Development. Your scope of work includes but not limited to: • Perform DFT logic insertion and stitching into RTL code or netlists using EDA/CAD tools for ATPG scan (internal/compressed stuck-at and at-speed scan), Memory BIST, and Boundary Scan. • Work closely with front-end te
一週以前更新 兩週內0-5人應徵
2021-10-20
台灣超捷國際股份有限公司
  • 大學 碩士
  • 三年以上工作經驗
  • 待遇面議
Job Description: In this position, you will be responsible for all the DFT related matters in Microchip’s Wireless SoC Development. Your scope of work includes but not limited to: • Perform DFT logic insertion and stitching into RTL code or netlists using EDA/CAD tools for ATPG scan (internal/compressed stuck-at and at-speed scan), Memory BIST, and Boundary Scan. • Work closely with front-end t
一週以前更新 兩週內0-5人應徵
2021-10-20
台灣超捷國際股份有限公司
  • 大學以上
  • 八年以上工作經驗
  • 待遇面議
Job Description: In this position, you will be responsible for all the DFT related matters in Microchip's Wireless SoC Development. Your scope of work includes but not limited to: • Perform DFT logic insertion and stitching into RTL code or netlists using EDA/CAD tools for ATPG scan (internal/compressed stuck-at and at-speed scan), Memory BIST, and Boundary Scan. • Work closely with front-end
一週以前更新 兩週內0-5人應徵
2021-10-20

DFT CAD Engineer

FULL_TIME
新竹縣竹北市
擎亞台灣半導體股份有限公司
  • 碩士
  • 三年以上工作經驗
  • 待遇面議
(1) DFT design methodology development. (2) Flow development for MBIST, SCAN & ATPG. (3) In-house DFT design-kit/utility/script development.
兩週以前更新 兩週內0-5人應徵
2021-10-12
Mentor Graphics_愛爾蘭商明導國際股份有限公司台灣分公司
  • 大學 碩士
  • 二年以上工作經驗
  • 待遇面議
Job Responsibility: Major Responsibilities: Deliver the Customer Silicon Test Solutions: Insert Memory BIST controllers with repair, boundary scan; scan insertion, generate ATPG vectors, at-speed ATPG implementation, assisting with ATPG debug, and ATE test for Yield Diagnosis and Learning process. Job Duties: 1. Communication: A confident, results-focused communication style 2. Must have exp
一週以前更新 兩週內0-5人應徵
2021-10-15
聯詠科技股份有限公司
  • 碩士以上
  • 二年以上工作經驗
  • 待遇面議
1. ARM CPU/GPU, DSP front end implementation including high speed RTL synthesis and DFT. 2. Front end verification including logic equivalence check, constraint quality check, static timing analysis and ATPG. 3. Requirement: 3-1. Familiar with front end implementation design flow 3-2. Familiar with Synopsys synthesis and Mentor DFT/ATPG tools 3-3. Expertise in CPU/GPU/DSP front end implementation
6天以前更新 兩週內0-5人應徵
2021-10-22

DFT Engineer

FULL_TIME
新竹市
益芯科技股份有限公司
  • 碩士
  • 工作經驗不拘
  • 待遇面議
(1)BS degree in EE of related experience. (2)Familiar with IC design flow and DFT.
6天以前更新 兩週內0-5人應徵
2021-10-22

DFT EDA Engineer

FULL_TIME
新竹市
創意電子股份有限公司
  • 專科以上
  • 工作經驗不拘
  • 待遇面議
※Job Contents: 1. Responsible for IC DFT design methodology development and project support. 2. Flow development for Memory BIST, Scan, Boundary Scan, ATPG and so on. 3. In house EDA utility development ※Requirements: 1. MS in Electronic engineer or Computer science 2. Experience in DFT flow development (Memory BIST/BISR, SCAN, Boundary Scan, ATPG, Logic BIST, etc) 3. Experience in low power flow
3天以前更新 兩週內6-10人應徵
2021-10-25

DFT CAD Flow Engineer

FULL_TIME
新竹市
智原科技股份有限公司
  • 碩士以上
  • 工作經驗不拘
  • 待遇面議
1. Study / research / develop DFT design flow 2. Maintain inhouse DFT utilities.
三週以前更新 兩週內0-5人應徵
2021-09-29
虹晶科技股份有限公司
  • 碩士
  • 一年以上工作經驗
  • 待遇面議
DFT 開發設計: a.內崁邏輯與記憶體測試技術DFT (Scan/MBIST/MBISR/BSD) b.熟悉時序分析(STA) c.熟悉邏輯功能比對技術(Formal LEC)
5天以前更新 兩週內0-5人應徵
2021-10-23
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