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5G Flagship SoC Integration

FULL_TIME
新竹市
聯發科技股份有限公司
  • 碩士
  • 二年以上工作經驗
  • 待遇面議
1.SoC Chip Top and Infrastructure integration and physical design 2.Participate in SoC design implementation from logic synthesis to physical implementation stage under the latest technology process 3.Participate in SOC/Sub-System design architecture planning, RTL design rule check, Synthesis, DFT/ATPG, LEC, Timing sign-off, Timing ECO
6天以前更新 兩週內0-5人應徵
2021-11-24
聯發科技股份有限公司
  • 碩士
  • 二年以上工作經驗
  • 待遇面議
1.SoC Chip Top and Infrastructure integration and physical design 2.Participate in SoC design implementation from logic synthesis to physical implementation stage under the latest technology process
6天以前更新 兩週內0-5人應徵
2021-11-24

SOC Design Tech. Leader

FULL_TIME
新竹縣竹北市
擎亞台灣半導體股份有限公司
  • 大學 碩士
  • 十年以上工作經驗
  • 待遇面議
- Determination of SoC Design-Specification and Development of Top level Architecture - Logic Design and Verification - Architecture Design of BUS and POWER - TOP Level Sanity Check : Lint, CDC, Synthesis, EQ, ECO - TOP level & Block level SDC generation and verification (PT constraint) - TOP level & Block level UPF generation and verification (VC LP) - Performance Profiling, Power Estimation - Su
4天以前更新 兩週內0-5人應徵
2021-11-26

SoC Engineer

FULL_TIME
新竹市
系統精英科技股份有限公司
  • 碩士以上
  • 三年以上工作經驗
  • 待遇面議
1. Wireless SoC design.
1天以前更新 兩週內0-5人應徵
2021-11-29

SOC Design Engineer

FULL_TIME
新竹縣竹北市
擎亞台灣半導體股份有限公司
  • 大學 碩士
  • 三年以上工作經驗
  • 待遇面議
- Determination of IP Design-Specification and Architecture - Development of Sub-Block Level - Logic Design and Verification - Block Level Sanity Check : Lint, CDC, Synthesis, EQ, ECO - Block level SDC generation and verification (PT constraint) - Block level UPF generation and verification (VC LP) - Performance Profiling, Power Estimation
4天以前更新 兩週內0-5人應徵
2021-11-26
創意電子股份有限公司
  • 碩士以上
  • 三年以上工作經驗
  • 待遇面議
※Job Descriptions: 1.SoC/Subsystem verification : Job includes IP simulation bring up and testbench promote to subsystem/chip level 2.SoC/Subsystem design : Job includes spec study, architecting, RTL coding, simulation, debugging, Lint, CDC, synthesis, LEC, SDC, STA and FPGA verification. ※Job Requirements: 1.MS or PhD degree in EE, CS, or relevant fields 2.Good at verification skills such as UVM
1天以前更新 兩週內0-5人應徵
2021-11-29
美商矽磊科技股份有限公司台灣分公司
  • 碩士以上
  • 三年以上工作經驗
  • 待遇面議
1. Digital circuit design 2. SoC architecture and design
三週以前更新 兩週內0-5人應徵
2021-11-04

SoC/ASIC/IP digital design engineer

FULL_TIME
新竹縣竹北市
佳易科技股份有限公司
  • 碩士
  • 三年以上工作經驗
  • 待遇面議
- Design/development of SoC subsystem blocks. - Responsible for SOC system Integration/Verification - Generate detailed micro-architecture technical specifications and systems requirements and deliver the design - Work closely with verification team to develop verification plans and actively participate in debug phase - Work hands-on and own their design through the full SoC/ASIC development p
1天以前更新 兩週內0-5人應徵
2021-11-29

SOC 工程師

FULL_TIME
新竹市
104獵才顧問_一零四資訊科技股份有限公司
  • 碩士以上
  • 三年以上工作經驗
  • 待遇面議
1. Frontend designer for ASIC projects. 2. Design efforts for a final ASIC layout in 28 nm process and tape-out on time. 3. Experienced in SOC design and IP integration instead of small scale of IC design
一週以前更新 兩週內0-5人應徵
2021-11-21

SOC Design Lead

FULL_TIME
新竹縣竹北市
104獵才顧問_一零四資訊科技股份有限公司
  • 碩士以上
  • 十年以上工作經驗
  • 待遇面議
- Determination of SoC Design-Specification and Development of Top level Architecture - Logic Design and Verification - Architecture Design of BUS and POWER
一個月以前更新 兩週內0-5人應徵
2021-10-27

SoC IC Design Engineer

FULL_TIME
新竹縣竹北市
藍芯微電子有限公司
  • 碩士以上
  • 四年以上工作經驗
  • 待遇面議
Job description: 1. Whole chip integration 2. Simulation, synthesis, STA, and formal verification 3. Low-power design flow Familiar with the following: 1. ARM Cortex-M MCU family 2. AHB bus matrix
5天以前更新 兩週內0-5人應徵
2021-11-25

Analog IC design

FULL_TIME
新竹市
美商矽磊科技股份有限公司台灣分公司
  • 大學以上
  • 二年以上工作經驗
  • 待遇面議
1. 研究與設計類比IC。 2. 模擬與驗證類比IC電路。 3. 撰寫設計類比IC相關文件。
三週以前更新 兩週內0-5人應徵
2021-11-04

SOC System Architect

FULL_TIME
新竹市
聯發科技股份有限公司
  • 碩士以上
  • 八年以上工作經驗
  • 待遇面議
開發手機/平板SoC模擬及分析平台,從系統效能,功率消耗,溫度控制...等多重面向分析產品競爭力,進而從系統角度優化硬體架構及軟體控制策略。 * Develop SoC simulation and analysis platform for cell phone and tablet projects. * Optimize hardware architecture and software control policies in aspects of system performance/power/thermal to improve MediaTek's product competitiveness.
6天以前更新 兩週內0-5人應徵
2021-11-24

SoC數位IC設計工程師

FULL_TIME
新竹縣竹北市
奧瑞科技股份有限公司
  • 碩士以上
  • 四年以上工作經驗
  • 待遇面議
1. 數位IP設計、模擬驗證與合成 2. ARM-based SoC整合、模擬驗證與合成 3. Back-end之溝通協調與問題解決 4. FPGA整合與驗證 5. Design Flow規劃包括Synthesis, PrimeTime分析, LEC等
6天以前更新 兩週內0-5人應徵
2021-11-24
創意電子股份有限公司
  • 碩士以上
  • 十年以上工作經驗
  • 待遇面議
※Job Contents: 1.Task leading for the front-end design from RTL to netlist. 2.Main job includes spec study, architecting, RTL coding, simulation, debugging, Lint, CDC, synthesis, LEC, SDC, and STA. 3.Support other functional teams (such as IP team, DFT team, and P&R team) to deliver an SoC/ASIC. 4.Use communication and leadership skills to help the team to achieve the goal. ※Requirements: 1.碩士
1天以前更新 兩週內0-5人應徵
2021-11-29
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