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創意電子股份有限公司
  • 碩士以上
  • 五年以上工作經驗
  • 待遇面議
※Job Contents: 1. Follow customer design requirement to design the customized DDR, PCIE, USB and other Subsystem IPs for SoC chip-level integration 2. IP Wrapper Design, Testing Circuit Design, Implementation, Verification and Manufacturing 3. IP Subsystem Package Deliverable Enhancement 4. EDA and Automation Flow Development ※Requirements: 1. MS/PhD EE or CS related departments 2. 5 years or
一週以前更新 兩週內0-5人應徵
2022-01-10
創意電子股份有限公司
  • 大學 碩士
  • 工作經驗不拘
  • 待遇面議
※Job Contents: 1. Responsible for IC frontend design methodology development and project support. 2. Flow development for lint, constraint check, synthesis, STA, power analysis and so on. 3. In house EDA utility development ※Requirements: 1. MS in Electronic engineer or Computer science 2. Experience in R2N flow development (lint/constraint check/synthesis/STA/Simulation/formal etc) 3. Experience
一週以前更新 兩週內0-5人應徵
2022-01-10
創意電子股份有限公司
  • 專科以上
  • 工作經驗不拘
  • 待遇面議
※Job Contents: 1. Responsible for IC DFT design methodology development and project support. 2. Flow development for Memory BIST, Scan, Boundary Scan, ATPG and so on. 3. In house EDA utility development ※Requirements: 1. MS in Electronic engineer or Computer science 2. Experience in DFT flow development (Memory BIST/BISR, SCAN, Boundary Scan, ATPG, Logic BIST, etc) 3. Experience in low power flow
一週以前更新 兩週內0-5人應徵
2022-01-10
創意電子股份有限公司
  • 碩士以上
  • 五年以上工作經驗
  • 待遇面議
※Job Contents: 1.We are looking for DV engineer with solid digital verification technical skills. The responsibility is to deliver high-performance SOC with the highest standard of quality for world-wide customer in the process of 16nm or under. 2.This position will be responsible for working with Design Engineers in verification and validation of SOC. Participate in design reviews and recommend
一週以前更新 兩週內0-5人應徵
2022-01-10
創意電子股份有限公司
  • 碩士以上
  • 工作經驗不拘
  • 待遇面議
As a Test Vector Engineer, you will help to develop/modify tests to run on Automatic Test Equipment (ATE) for silicon testing, and handle silicon to production. In addition, you will work alongside test engineers to understand pre-production and production defects and create tests to catch these defects. This is the definition of a cross functional position, understanding the various Hardware desi
一週以前更新 兩週內0-5人應徵
2022-01-10
創意電子股份有限公司
  • 大學以上
  • 三年以上工作經驗
  • 待遇面議
※Requirements: 1. DDR/LPDDR/GDDR/HBM logic design and verification 2. RTL design 3. Digital Design Checks : CDC, LEC, STA, and etc. ※其他條件 1. Over 3-year digital design experiences 2. Familiar with DDR/LPDDR/HBM/SerDes or DSP is plus 3. Familar with digital IC front-end design flow such as Verilog RTL design, Synopsys Design Compiler, LEC, Spygalss, PrimeTime STA **此職缺適用於自我推薦獎金獎
一週以前更新 兩週內0-5人應徵
2022-01-10
創意電子股份有限公司
  • 大學 碩士
  • 工作經驗不拘
  • 待遇面議
※Job Contents: 1. Develop 2.5D/3D-IC multi-die stacking design flow for TSMC CoWoS, InFO, SoIC advanced technology 2. Deploy and enhance 2.5D/3D-IC physical design flow in real design with performing 3D multi-die stacking tasks: die-stacking configuration, floorplanning, layout, and die-to-die auto-routing 3. Develop 2.5D/3D-IC extraction signoff flow to ensure signal and power integrity 4. Design
一週以前更新 兩週內0-5人應徵
2022-01-10
創意電子股份有限公司
  • 碩士以上
  • 五年以上工作經驗
  • 待遇面議
※Job Contents: 1.We are looking for digital designer with solid digital design and technical skills. The responsibility is to deliver Sub-System level design and corresponding verification environment for high performance System-on-Chip. 2.Responsible for RTL, integration and verification of IP and customer specific digital design content. Expect to contribute to methodology development and effic
一週以前更新 兩週內0-5人應徵
2022-01-10
創意電子股份有限公司
  • 大學 碩士
  • 一年以上工作經驗
  • 待遇面議
※Job Contents: 1. Digital Design Verification 2. Work with digital design team to define verification plan . 3. Develop in house VIP 4. Use standard protocol VIP 5. Verify RTL design ※Requirements: 1. Familiarity with OOP , has design patter knowledge is plus 2. Familiarity with Systemverilog , has UVM experience is plus 3. Experience in IP verification 4. VIP use Experience **此職缺適
一週以前更新 兩週內0-5人應徵
2022-01-10
創意電子股份有限公司
  • 碩士以上
  • 三年以上工作經驗
  • 待遇面議
※Job Contents: 1. Digital IP design 2. ARM CPU and AMBA platform integration and verification 3. IP integration (CPU / coresight / PCIe / USB / DDR / Ethernet / Serdes ) 4. Techbench build up and simulation bring up 5. FPGA emulation ※Requirements: 1. SoC integration and verification(Over 3 years) 2. Familiar with AMBA bus architecture 3. Familiar with (ARM CPU / coresight / PCIe/USB / DDR) is pl
6天以前更新 兩週內0-5人應徵
2022-01-11
創意電子股份有限公司
  • 碩士以上
  • 三年以上工作經驗
  • 待遇面議
※Job Descriptions: 1.SoC/Subsystem verification : Job includes IP simulation bring up and testbench promote to subsystem/chip level 2.SoC/Subsystem design : Job includes spec study, architecting, RTL coding, simulation, debugging, Lint, CDC, synthesis, LEC, SDC, STA and FPGA verification. ※Job Requirements: 1.MS or PhD degree in EE, CS, or relevant fields 2.Good at verification skills such as UVM
一週以前更新 兩週內0-5人應徵
2022-01-10
創意電子股份有限公司
  • 大學以上
  • 工作經驗不拘
  • 待遇面議
※Job Contents: 1.Took responsibility of creating SDC for the complex SoC. 2.Took responsibility of timing analysis with customer. 3.Took responsibility of planning low-power structure and review flow (CPF/UPF). 4.Supported back-end team in post-layout timing closures 5.Supported project team in central tech-library management 6.Run EDA-Tool and GUC in-house design kit. ※Requirements: 1.Familiar
一週以前更新 兩週內0-5人應徵
2022-01-10
創意電子股份有限公司
  • 碩士以上
  • 五年以上工作經驗
  • 待遇面議
※Job Contents: 1. IP verification for SOC integration 2. IP driver porting/coding on Linux/RTOS ※Requirements: 1.碩士以上,電機電子/資工系所佳 2.Experience on U-Boot and Linux porting to a new SoC **此職缺適用於自我推薦獎金獎勵** 自我推薦獎金辦法: 1.期間限定:2021/12/20-2022/06/30 2.獎勵內容: 相關年資1年(含)-未滿3年:NT$ 3萬元/位 相關年資3年(含)-未滿5年:NT$ 5萬元/位 相關年資5年(含)-未滿8年:NT$
一週以前更新 兩週內6-10人應徵
2022-01-10
創意電子股份有限公司
  • 專科 大學
  • 一年以上工作經驗
  • 待遇面議
※Job Contents: 1.Mix mode 2.Analog layout 3.Full Customer Layout ※Requirements: 1.具類比IP、special I/O、Mixed mode full custom layout經驗。 2.具full custom IC layout / verification經驗。 3.具 Laker/Virtuoso, Calibre LVS / DRC/ Calibre等工具經驗。 4.具16/ 7/5nm IC layout experiences is a plus. 5.歡迎有IC layout經驗3年以上者加入。 **此職缺適用於自我推薦獎金獎勵** 自我推薦獎金辦法: 1.期間限定:202
一週以前更新 兩週內6-10人應徵
2022-01-10
創意電子股份有限公司
  • 大學 碩士
  • 十年以上工作經驗
  • 待遇面議
※Job contents 1. Test program development and debugging 2. Test hardware (Probe card, load board, socket) design and verify 3. Project management 4. Test data analysis 5. Collect characterization datalog for process improvement and develop reliability qualification test ※Qualification 1.10+ years experience with ATE program development. Especially for high speed/power product. 2.Familiar with
一週以前更新 兩週內0-5人應徵
2022-01-10
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