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SoC Physical Design Engineer/主管

FULL_TIME
台北市內湖區
巨有科技股份有限公司
  • 大學以上
  • 一年以上工作經驗
  • 待遇面議
1.Responsible for ASIC Backend / Physical Implementation, including floorplan, power plan, physical synthesis, clock tree synthesis, routing, si, DFM, DRC/LVS in both hierarchical and low power designs. 2.Responsible for Physical Design flow research, development and automation.
一個月以前更新 兩週內0-5人應徵
2021-12-17

SOC Physical Design Engineer-台北

FULL_TIME
台北市內湖區
智原科技股份有限公司
  • 大學 碩士
  • 工作經驗不拘
  • 待遇面議
1. Responsible for ASIC physical implementation by using automatic place and route tools. The P&R processes including floorplanning, power plan synthesis and analysis, physical timing optimization, clock tree synthesis, routing, and post-routing optimizations. 2. Responsible for physical verification including DRC, LVS and ESD checking.
一個月以前更新 兩週內6-10人應徵
2021-12-03

SoC Physical Design Engineer(內湖)

FULL_TIME
台北市內湖區
英屬開曼群島商世芯股份有限公司台灣分公司
  • 大學 碩士
  • 一年以上工作經驗
  • 待遇面議
1. Perform gate level netlist to GDS design independently including and not limit to floor planning, place&route, clock tree synthesis, timing sign off and physical verification. 2. For DFT engineers, need to able to implement scan chain, atpg, mbist, jtag, IP test logic into netlist. 3. Perform design IP implementation, IR drop analysis, DFT, STA and foundry merge. 4. Work with manager to achi
4天以前更新 兩週內6-10人應徵
2022-01-21

【台北】APR Physical Design Engineer

FULL_TIME
台北市內湖區
聯詠科技股份有限公司
  • 大學以上
  • 工作經驗不拘
  • 待遇面議
1. APR physical design, including floorplan, power plan, physical synthesis, clock tree, routing, DRC/LVS to tapeout 2. APR physical design methodology development & automation 3.Requirement: 3-1. Familiar with ASIC design flow相關尤佳 3-2. Hands on APR physical design from netlist to DRC/LVS tapeout experience is required 3-3. Familiar with hierarchical and/or low power design flow相關
一週以前更新 兩週內6-10人應徵
2022-01-18
創意電子股份有限公司
  • 專科以上
  • 五年以上工作經驗
  • 待遇面議
※依學經歷核定職稱 ※Job Contents: 1. Perform Netlist-to-GDS design flow, including floorplanning, placement, timing optimization, clock tree synthesis and routing. 2. Support STA timing analysis and fixing 3. Perform physical verification, including DRC, LVS, IR drop and DFM analysis. ※Requirements: 1. Familiar with Cadence Innovus or Synopsys ICC2/Fusion Compiler. 2. TOEIC 730~855 is preferred. 3
1天以前更新 兩週內0-5人應徵
2022-01-24

(台北-TPE) Mixed Mode Design Engineer

FULL_TIME
台北市中正區
力旺電子股份有限公司
  • 碩士以上
  • 工作經驗不拘
  • 待遇面議
歡迎至力旺招募官網註冊,直接投遞履歷:https://recruit.ememory.com.tw/ 1.記憶體存取電路設計 2.自我測試與介面電路設計 3.數位與類比整合模擬 4.標準單元庫電路建立 5.支援嵌入式記憶體(Embedded Memory) 數位電路前段設計和偵錯 6.提升數位設計後段APR(Automatic Place and Route) 實體設計效能 7.提供APR實體設計教育訓練、研發創新電路架構提升各產品線效能與競爭力 ----------------------------------------------------
一週以前更新 兩週內0-5人應徵
2022-01-18
微感科技有限公司
  • 碩士以上
  • 五年以上工作經驗
  • 待遇面議
As a digital ASIC Design Engineer, the individual’s primary responsibility will be RTL design. This will include block/function definition, specification, design, simulation and unit level verification of digital functions on Mixed Signal ASICs Key Qualifications • BSEE or MSEE with 5+ years of experience in front-end digital ASIC design. • Proficient knowledge of industry standard tools and be
一週以前更新 兩週內0-5人應徵
2022-01-18

Operation Engineer (Remote)

FULL_TIME
台北市松山區
NOVELSHIP_奇運科技資訊有限公司
  • 大學
  • 三年以上工作經驗
  • 月薪 45,000 ~ 65,000 元
Novelship is Asia's growing online marketplace for authentic sneakers and streetwear. Driven by our passion to be the game changer, we are one-of-a-kind marketplace in Asia, delivering great, fuss-free experience for our customers. In our next stage of hypergrowth, we are looking for a Software Engineer (Remote), to join our team. By joining our Operations Engineering team, you will be working cl
一週以前更新 兩週內0-5人應徵
2022-01-17
新加坡商優思特股份有限公司台灣分公司
  • 專科以上
  • 四年以上工作經驗
  • 待遇面議
Responsibilities: Synthesizing the multi-power domain blocks/IPs with challenging power, area and timing constraints Formal Equivalence Checking Constraint development, timing closure and STA Support to physical design team in fine-tuning the floorplan & constraints for implementation. UPF/CPF based flow.
5天以前更新 兩週內0-5人應徵
2022-01-20

Product Manager, Physical Products

FULL_TIME
台北市中山區
英屬開曼群島商庫幣科技有限公司台灣分公司
  • 大學以上
  • 工作經驗不拘
  • 待遇面議
The Role As a part of the product management team for CoolWallet, the Product Manager will focus on the discovery, development and delivery of our physical products and its related services. The main focus of this role is the management of multiple product initiatives or existing product optimizations of the physical products at CoolBitX. This might include but are not limited to: 1. Discover and
一週以前更新 兩週內6-10人應徵
2022-01-18
思霈科股份有限公司
  • 碩士以上
  • 工作經驗不拘
  • 待遇面議
1. System deisgn targeting 3GPP NR (New Radio) technologies including multiple access, frame structure, synchroniation, MIMO, phsyical channel/signal design, Layer1 procedure. 2. Support Intellectual Property related procedure based on company strategy. 3. Standardization activities including technical document submission, new feature monitoring, and cooperation with other leading companies.
6天以前更新 兩週內0-5人應徵
2022-01-19

EDA Tool Design Engineer

FULL_TIME
台北市中正區
亞睿資訊股份有限公司
  • 大學 碩士
  • 工作經驗不拘
  • 待遇面議
1. Develop innovative solutions for X-verification, X-pessimism elimination and gate-level simulation bring up 2. Responsible for designing, developing, or debugging software programs. 3. Enhanced Insight, an RTL symbolic simulator, to support new SystemVerilog features
4天以前更新 兩週內0-5人應徵
2022-01-21

Electronic Hardware, Design Engineer

FULL_TIME
台北市內湖區
法商_施耐德電機股份有限公司
  • 大學 碩士
  • 工作經驗不拘
  • 待遇面議
Do you dream of working in a company that is driven by a meaningful purpose? An inclusive company that empowers you to do your best and be innovative? At Schneider Electric, we believe access to energy and digital is a basic human right. We empower all to do more with less, ensuring Life Is On everywhere, for everyone, at every moment. We provide energy and automation digital solutions for effici
兩個月以前更新 兩週內0-5人應徵
2021-11-08
力旺電子股份有限公司
  • 碩士以上
  • 工作經驗不拘
  • 待遇面議
歡迎至力旺招募官網註冊,直接投遞履歷:https://recruit.ememory.com.tw/ 1. 非揮發性記憶體電路開發設計(Array, Decoding, Sense Amplifier等電路) 2. 非揮發性記憶體週邊類比電路開發設計與佈局優化(Bandgap, LDO, Charge Pump等類比電路) 3. 消費性、物聯網與車用電子之非揮發性記憶體電路整合開發設計 4. 協助非揮發性記憶體測試晶片偵錯, 驗證 5. 協助客戶嵌入使用以及導入量產非揮發性記憶體IP產品 ----------------
一週以前更新 兩週內0-5人應徵
2022-01-18

Digital IC Design Engineer

FULL_TIME
台北市南港區
開酷科技股份有限公司
  • 大學 碩士
  • 三年以上工作經驗
  • 待遇面議
KaiKuTek is the world's leading provider for 3D gesture sensor using mmWave Radar with embedded AI accelerator. We possess key technologies in areas such as Antenna-in-Package (AiP), ML algorithm, AI accelerator, as well as 60 GHz radar transceiver design. With recent merger by JMicron, founded in 2001 and located in Hsinchu Science Park, our product portfolio expands to high speed SerDes bridge
一週以前更新 兩週內0-5人應徵
2022-01-18
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