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18401 筆查詢結果
聯發科技股份有限公司
  • 碩士
  • 二年以上工作經驗
  • 待遇面議
Digital circuit design for DTCO(Design technology Co-Optimization)
一週以前更新 兩週內0-5人應徵
2021-11-24
智成電子股份有限公司
  • 大學以上
  • 工作經驗不拘
  • 待遇面議
1.In charge of digital circuit design/verify by Verilog/VHDL 2.Familiar with ASIC design flow or FPGA development is a plus. 3.Familiar with MCU SoC design is a plus. 4.Familiar with RF baseband design is a plus.
1天以前更新 兩週內0-5人應徵
2021-12-01

Senior Digital Design Engineer( Zhubei)

FULL_TIME
新竹縣竹北市
Dialog Semiconductor_德商戴樂格半導體有限公司台灣分公司
  • 學歷不拘
  • 工作經驗不拘
  • 待遇面議
Working as a Senior Digital Design Engineer based in Zhubei, you will: • Design optimized digital blocks meeting functional, cost, and low power constraints and ensure spec compliance. • Cover digital backend design from synthesis, static timing, and logic equivalent checking. • Interface with P&R for digital hand-off and post layout verification. • Collaboration with analog engineers and test eng
一週以前更新 兩週內0-5人應徵
2021-11-25

Digital ASIC Design Engineer

FULL_TIME
新竹市
瑞典商_芬格科技有限公司
  • 碩士以上
  • 三年以上工作經驗
  • 待遇面議
To strengthen and building up our new ASIC team in Hsinchu, Taiwan, we are looking for Digital ASIC Design Engineers who wants to make a difference and strengthen the development of Fingerprint’s sensor technology. You will report directly to the ASIC Manager/Project Manager in Hsinchu. We offer you an exciting and challenging position together with friendly and professional colleagues. Work in a
1天以前更新 兩週內0-5人應徵
2021-12-01

Circuit Design Engineer

FULL_TIME
新竹市
台灣積體電路製造股份有限公司(台積電)
  • 博士
  • 工作經驗不拘
  • 待遇面議
【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表,此職缺履歷登錄網址:https://tinyurl.com/v7k3d7d 【Description】 1.Circuit Design for memory related testchips 2.Research on circuit designs for high-density memory and computing-in-memory 3.Conduct research in the field of circuit designs for future high-density memory and computing-in-memory for AI applications in collaboration
兩個月以前更新 兩週內0-5人應徵
2021-09-13

Digital/Logic Design Engineer(竹北)

FULL_TIME
新竹縣竹北市
英屬蓋曼群島商譜瑞科技股份有限公司台灣分公司
  • 碩士以上
  • 一年以上工作經驗
  • 待遇面議
1. Design RTL/Logic using Verilog 2. Simulate and develop IPs and Subsystems 3. Validate silicon and debug
2天以前更新 兩週內0-5人應徵
2021-11-30

Senior Digital Design Engineer - Zhubei

FULL_TIME
新竹縣竹北市
Dialog Semiconductor_德商戴樂格半導體有限公司台灣分公司
  • 學歷不拘
  • 工作經驗不拘
  • 待遇面議
The Role Working as a Senior Digital Design Engineer based in Zhubei, you will: • Design optimized digital blocks meeting functional, cost, and low power constraints and ensure spec compliance. • Cover digital backend design from synthesis, static timing, and logic equivalent checking. • Interface with P&R for digital hand-off and post layout verification. • Collaboration with analog engineers and
1天以前更新 兩週內0-5人應徵
2021-12-01

Sr. Circuit Design Engineer

FULL_TIME
新竹市
台灣積體電路製造股份有限公司(台積電)
  • 碩士以上
  • 工作經驗不拘
  • 待遇面議
【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表,此職缺履歷登錄網址: https://tinyurl.com/ydcad742 【Description】 - Design full custom read and write circuits at transistors level - Simulate and analyze the circuit design using transistor level simulators. - Extract the layout and perform post-layout simulations and verification - Floorplan physical implementation and leafcell
兩個月以前更新 兩週內0-5人應徵
2021-09-13

Standard cell design engineer

FULL_TIME
新竹縣竹北市
聯詠科技股份有限公司
  • 碩士
  • 三年以上工作經驗
  • 待遇面議
任職於Design Engineering Service (DES) 部門,負責Standard cell設計及效能最佳化分析、In-house cell library開發、3rd party cell library維護。 1.Standard cell circuit design and optimization。 2.Library design methodology development。 3.Cell characterization and library generation。 4.Library QA and maintenance。 5.Technical support of in-house & 3rd-party libraries。 【共創A+聯詠】 穩健踏實、專
3天以前更新 兩週內11-30人應徵
2021-11-29

Senior Analog Hardware Design Engineer

FULL_TIME
新竹縣竹北市
美商艾科斯羅國際股份有限公司台灣分公司
  • 大學以上
  • 五年以上工作經驗
  • 月薪 40,000 元以上
Job Summary: This position is for a senior hardware design engineer reporting into the Digital/Mixed Signal product development group. The successful candidate will be leading the development of high-performance analog/mixed signal technology as a member of our product development team for PCB instrumentation in many design areas, including: 1. Precision measurement 2. Signal sourcing, and DSP
3天以前更新 兩週內0-5人應徵
2021-11-29
台灣積體電路製造股份有限公司(台積電)
  • 碩士以上
  • 工作經驗不拘
  • 待遇面議
【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表,此職缺履歷登錄網址:https://tinyurl.com/y4x7l394 【Description】 Front-end to back-end large scale digital circuit design for system-on-chips and 3DICs, responsible for designing with the state-of-the-art process technologies and developing corresponding CAD flows that explores cutting edge design methodologies and latest EDA too
兩個月以前更新 兩週內0-5人應徵
2021-09-13
台灣英飛朗股份有限公司
  • 碩士以上
  • 六年以上工作經驗
  • 年薪 1,500,000 ~ 3,000,000 元
Imagine being part of a team that is fundamentally changing the way people communicate, the way they collaborate, the way they watch TV and explore the universe through the internet. Utilizing our uniquely differentiated technology, we have created an Intelligent Transport Network with more speed, capacity, and scalability than ever before. Imagine a world with unlimited bandwidth. The network of
1天以前更新 兩週內11-30人應徵
2021-12-01
NVIDIA_英屬維京群島商輝達維京股份有限公司台灣分公司
  • 大學 碩士
  • 五年以上工作經驗
  • 待遇面議
We are looking for a Senior Mask Layout Design Engineer – someone who is excited to join a growing group of diverse individuals responsible for handling challenge high-speed mixed-signal circuit designs. NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized p
三週以前更新 兩週內0-5人應徵
2021-11-11
智原科技股份有限公司
  • 大學以上
  • 工作經驗不拘
  • 待遇面議
1. Front-end design flow development 2. Logic Synthesis, STA, LEC, ECO flow creation and consultant
兩週以前更新 兩週內0-5人應徵
2021-11-15

Sr. Design Engineer (新竹)

FULL_TIME
新竹縣竹北市
萬有半導體有限公司
  • 大學以上
  • 八年以上工作經驗
  • 待遇面議
Circuit Designer- Do circuit design tasks for new product development, and work closely with AE, Layout Engineer and TE.
2天以前更新 兩週內0-5人應徵
2021-11-30
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