數位IC設計工程師職缺/工作機會 - 分類找工作

急徵工作

  • Ethernet PHY IC

    預算100萬以上

    Gigabit Ethernet PHY IC porting 1.Gigabit Ethernet PHY 系統設計經驗數位部分 2.驗証Gigabit Ethernet PHY IC 相關經驗 3.了解Gigabit Ethernet PHY IC相關系統韌體 4.Ethernet PHY 的演算法開發 (長期顧問): 具備熟悉數位通訊, 數位訊號處理, Digital Filter, Equalizer, Timing Recovery, Auto-Gain control, Baseline wander correction & echo cancellatio

  • 類比電路模擬及電路講解

    預算1萬~2萬

    我們需要具備以下條件人才: 1. 熟悉各項半導體類比電路設計,如電源管理、AD/DAC、RF、Serdes等不同電路設計技術 2. 熟悉建立Simulation pattern及產生Design report 3. 能夠說明電路架構及其Waveform 4. 熟悉Cadence Composer、HSPICE或Specter 以上,我們會在簽署完成所有合約包含保密條款後,交付指定IC的逆向工程電路,以Cadence Composer檔案格式為主讓你進行Simulation及產生Waveform說明電路的Behavior 執行地區不限,可在自家錄製影音檔即可

  • APR 4個月專案

    預算45萬~50萬

    徵求4個月左右的短期APR工程師,支援APR專案團隊完成 APR implemetation。工作地點新竹、台北、SOHO可協調,因此工作地點相當彈性。 * Project based (project is around 4 months). * Will be hired as contracted consultant and involed in APR implemetation. * Working location Hsinchu or Taipei are negotiable. As a Physical Design Consultant, you will be responsible for assisting our customers successfully tape out from RTL to GDS or from Netlist to GDS by using EDA tools. Your main focus will be in the areas of design planning, floorplanning, physical synthesis, place and route, parasitic extraction, signal integrity analysis and prevention, IR drop analysis and physical verification (DRC/LVS). A secondary focus will be in static timing analysis and formal verification. You will be working as a member of the customer’s IC design team, leveraging their experience and industry best practices to have immediate impact on their current project while transferring valuable knowledge for future projects.

  • IC LAYOUT (IC佈局工程)

    預算2萬~5萬

    1.急件,發案方尋求 IC LAYOUT (IC佈局工程師) 2.此為短期配合,時間:即可起至12/31 3.設計與驗證類比IC電路layout。 4.熟悉laker工具 5.發案方在竹北 6.意者請直接e-mail 聯絡

  • PCB 板Layout 設計

    預算5千~1萬

    1.電子基板Layout 2.具相關經驗者 3.執行細節請提案後電洽詳談