- Responsible for entire analog design implementation that covers design specification, design creation, integration and optimization to layout review, final post-layout simulation, silicon characterization and system test and debug. - Experience in analog IP development that include SERDES, ADC, DAC, Audio Codec, PLL, IO, memory, analog blocks and high speed PHY for 130nm, 90nm and below technologies. - Knowledge in high speed PHY design (PCIE, USB, GbE, DDR, ETHERNET) is an added advantage. - Preferably done some test characterization, measurement and compliance in previous employment
待遇面議
(經常性薪資達 4 萬元或以上)
不拘
1. Must have in-depth knowledge in circuit and logic IP design flow with hands-on experience in design and development, mixed signal design and simulation verification, IP test/characterization, low power high speed design methodology. Scripting in Perl, TCL, Unix, Linux. 2. The ability to work with multiple team members. 3. Working experience in EDA tools such as Synopsys Design Compiler, Physical Compiler, PrimeTime etc is a plus.
【具競爭水準的薪資福利】 -三節禮券(端午、中秋、春節) ,生日禮券 -績效獎金(依公司營運及個人績效擬定) -員工服務滿一定年限,可申請認股 -依業績達成率發放季激勵獎金 【人才激勵與發展制度】 -適才規劃教育訓練發展 -優秀員工表揚計畫, 獎勵計劃 -新人關懷與一對一指導制度 【工作與生活】 -一年一次的免費員工健康檢查 -生育、傷病、住院、急難、婚喪禮金補助 -公司聚餐,團保 -給予優於勞基法之特休, 彈性上下班 -享台元生活圈,所有設施皆可於非工作時段使用 我們的成功來自於客戶的成功。因此,公司重視客戶導向的觀念,加強客戶服務與溝通上的能力,以滿足、甚至超越客戶的需求。 除了根據不同職類訂定個別的學習發展地圖, 實施必要的在職訓練之外, 鼓勵員工參加外訓課程,提供員工學習機會與資源。