軟體研發類 (12936): R&D Engineering, Staff Engineer (有Zebu/Verilog經驗者佳)

10/25更新
7 天內聯絡過求職者
應徵

工作內容

若有興趣者,請務必上傳英文履歷至官網,否則不予受理(職缺代碼12936): https://careers.synopsys.com/job/hsinchu/r-and-d-engineering-staff-engineer-zebu-12936/44408/87200702592 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: A highly skilled engineer with a deep understanding of simulation, emulation, and compiler technologies. You bring extensive experience with HDL languages like Verilog and have previously worked with VCS and ZeBu platforms. Your proficiency in programming languages such as C/C++ is complemented by a strong grasp of data structures and algorithms, including graph theory. You excel in designing modular, scalable software architectures and optimizing software performance through multi-threading and operating system concepts. Your familiarity with version control systems like Perforce and Git enables you to manage code efficiently and collaborate seamlessly with other teams. You are an effective communicator, able to convey complex technical concepts clearly and work collaboratively in a dynamic environment. Your passion for technology drives you to stay updated with industry trends, and you actively mentor and guide junior engineers, fostering a culture of continuous learning and innovation. What You’ll Be Doing: 1.Designing and developing high-performance software for Synopsys' simulation and emulation platforms, including VCS and ZeBu. 2.Collaborating with cross-functional teams to enhance product capabilities and performance. 3.Conducting comprehensive research and analysis to address complex engineering challenges. 4.Leading project initiatives, ensuring timely and high-quality deliverables. Mentoring junior engineers and fostering a culture of continuous learning and innovation. 5.Integrating new technologies and staying abreast of industry trends to drive continuous improvement. The Impact You Will Have: 1.Enhancing the performance and reliability of emulation platforms used for cutting-edge silicon chips. 2.Driving the development of next-generation simulation and emulation tools. 3.Improving the usability and adoption of Synopsys products across various industries. 4.Contributing to a collaborative and innovative engineering culture within the team. 5.Advancing the future of technology and connectivity through continuous innovation. 6.Delivering high-quality, performance-optimized software solutions that elevate Synopsys' success. What You’ll Need: *CS or EE master's degree or above at least five of relevant experience. *Proficiency in programming languages: C/C++. *Strong understanding of data structures and algorithms, including graph theory. *Experience with hardware description languages like Verilog and scripting languages like TCL. *Prior experience with HDL simulation and emulation platforms, including VCS and ZeBu. *Familiarity with version control systems like Perforce and Git. *Ability to design and implement modular, scalable software architecture. *Proficiency in multi-threading and operating system concepts for software *performance optimization. Who You Are: A proactive and innovative thinker with a passion for technology. A collaborative team player who thrives in a dynamic environment. An effective communicator with strong interpersonal skills. A mentor and leader who inspires and guides junior engineers. A continuous learner who stays updated with industry trends and advancements.

工作待遇

待遇面議

(經常性薪資達 4 萬元或以上)

工作性質

全職

上班地點

新竹市 (新竹科學園區)

管理責任

不需負擔管理責任

出差外派

無需出差外派

上班時段

日班

休假制度

週休二日

可上班日

不限

需求人數

1人

條件要求

工作經歷

3年以上

學歷要求

碩士以上

科系要求

電機電子工程相關、資訊工程相關

語文條件

英文 -- 聽 /中等、說 /中等、讀 /精通、寫 /精通

擅長工具

工作技能

其他條件

請務必投遞官網(12936): https://careers.synopsys.com/job/hsinchu/r-and-d-engineering-staff-engineer-zebu-12936/44408/87200702592

歡迎肢體障礙(下肢)的身心障礙人士

公司環境照片(5張)

Synopsys Taiwan Co., Ltd._台灣新思科技股份有限公司 企業形象

福利制度

法定項目

其他福利

除法定福利以外,所有正式員工可享有以下公司贊助之福利: ※【薪資福利】※ 具競爭性的薪資獎酬 員工認股分紅計畫 ※【身心健康】※ 員工與眷屬醫療保險及健保補助 每年度享有自選式專屬健檢計畫 免費員工協助計畫,提供專業個人與生活諮詢 ※【工作生活平衡】※ 混合辦公模式,提供自由、彈性工作環境 新進同仁即享有特休,首年12天依到職日比例給予​ 每年15天全薪病假、3天全薪事假 ※【學習與成長】※ 多軌制的晉升與完善的教育訓練 跨國團隊合作及轉調機會 全球化的培訓課程與資源 ※【樂活工作】※ 每月定額享樂運動津貼 國內/外旅遊補助 每季免費下午茶 多元社團活動

聯絡方式

聯絡人

HR

其他

請務必投遞官網(12936): https://careers.synopsys.com/job/hsinchu/r-and-d-engineering-staff-engineer-zebu-12936/44408/87200702592
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