Job description Join our innovative team specializing in cutting-edge embedded memory solutions. We are seeking Analog Circuit Engineers to play a key role in the design and development of high-performance embedded DRAM and associated peripheral circuits. In this position, you will be responsible for the complete cycle of DRAM circuit design and simulation verification. Your tasks will involve developing novel circuit topologies, transistor-level design, optimizing performance metrics, and ensuring robust functionality through extensive simulations using industry-standard EDA tools. Required qualifications include a strong technical background in Electrical Engineering, Electronics Engineering, Computer Engineering, Physics, or a closely related field. Candidates must possess demonstrated, significant experience in DRAM circuit design and comprehensive simulation verification methodologies. Ideally, candidates will have proven design experience in specific DRAM-related circuit blocks, including but not limited to: Row and Column Decoder circuits Control path logic DC-DC converters, Charge Pumps, and Bandgap References Delay Locked Loops (DLLs) and Phase Locked Loops (PLLs) Negative voltage generators (NVG) and other critical peripheral circuits This is an excellent opportunity to contribute to state-of-the-art embedded memory designs in a dynamic, collaborative environment. If you are a skilled analog designer passionate about solving complex challenges in DRAM circuitry, we encourage you to apply and help shape the future of embedded memory technology.
待遇面議
(經常性薪資達 4 萬元或以上)
語文條件:英文(多益英檢700分以上) 擅長工具:Hspice, Cadence, Virtuoso, Layout工具 1. 電子工程、電機工程、半導體工程相關科系,碩士以上學歷 2. 具DLL, SA 等analog circuits design, Negative-voltage generator及 memory design, FinFET 相關經驗者尤佳。 3. 正面樂觀,具良好溝通協調技巧,團隊精神及創新思維 4. 工作經驗十年以上 尤佳。
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