Electrostatic Discharge (ESD) Engineer_技術開發部(新竹廠)

Overview: This role is integral to the semiconductor technologies, process development, device design, reliability, and manufacturing teams. The ESD engineer in this setting designs and evaluates ESD protection strategies at the device, circuit, and system level, directly influencing product reliability, yield, and time-to-market for new semiconductor platforms. Key Responsibilities: • ESD Strategy Development: Define and implement ESD strategies for new technologies, devices, and processes. • Design Collaboration: Work with device, circuit, and layout teams to co-optimize ESD protection and performance. • Process Integration: Develop and qualify ESD concepts with process teams; assess materials and modules for robustness. • Testing & Characterization: Design and perform ESD/latch-up tests (HBM, CDM, TLP, etc.); analyze results and recommend improvements. • Failure Analysis: Lead root cause investigations using advanced FA tools; drive corrective actions. • Project Support: Monitor ESD performance during qualification and ramp-up; resolve issues with cross-functional teams. • Innovation: Stay updated on ESD physics, simulation, and device technology advancements. Qualifications: • 10+ years of ESD-related industry experience. • Deep knowledge of ESD mechanisms at the semiconductor device and circuit level. Familiarity with semiconductor process flows, device structures, and materials. • Hands-on experience with ESD and latch-up testing standards (HBM, CDM, MM, TLP, VF-TLP, etc.) and related test hardware. • Proficient in interpreting device layouts, TCAD/device simulation, and failure analysis techniques. • Strong analytical and problem-solving abilities, especially in root cause investigations and correlation of ESD stress to physical failures.