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「Analog Circuit Design Engineer 類比IC設計工程師」的相似工作

新相量子光學股份有限公司
共500筆
10/20
台北市內湖區8年以上碩士以上
※實際任用職稱依個人相關經歷敘薪。 1. 熟悉Display Driver IC 原理. 2. 可獨立完成Charge Pump design. 3. 可獨立完成Band Gap, Regulators , LDO circuit design. 4. 熟悉類比電子電路專業知識如OP-AMP的設計 5 .個性主動積極、熱誠 、樂觀 . 6. 8~10年經驗 7. mipi. lvds frontend 設計與 debug 經驗尤佳
應徵
10/20
新竹市3年以上碩士以上
1. Main responsibility is to design analog IPs in MCU such as adc/dac, pll, osc, por, ldo 2. 具備DC-DC Converter, Buck相關電路設計 2. Responsible for analog IP design, verification plan, test plan, document 3. Communicate with system, layout and digital engineer to ensure high quality --------------------------------------------------------------------------------------- 雅特力科技創立於2016年,為智原科技子公司。 【Artery雅特力】即將在台上市的IC設計公司,主要產品為32bit ARM core base MCU 公司網址:https://www.arterychip.com 關於雅特力:https://www.104.com.tw/company/1a2x6blojm
應徵
10/22
台北市內湖區3年以上碩士以上
1. 類比IP相關功能的設計與實現 ADC, DAC, OSC, PLL, high speed interface...etc. 2. 類比IP設計方法和品質改進 3. 類比IP仿真與分析 4. 與第三方類比 IP 供應商合作 5. 與數位電路作co-sim
應徵
10/20
新竹市2年以上碩士以上
Digital IC design engineer - Familiar with Verilog RTL coding - Familiar with digital design flow (pre-layout simulation, timing constraint, synthesis, post-layout simulation) - Will be working on high speed Serdes IPs - Experience or interest in all-digital PLLs or clock-data recovery circuits is a big plus
應徵
10/07
新竹縣竹北市3年以上碩士以上
- Responsible for entire analog design implementation that covers design specification, design creation, integration and optimization to layout review, final post-layout simulation, silicon characterization and system test and debug. - Experience in analog IP development that include SERDES, ADC, DAC, Audio Codec, PLL, IO, memory, analog blocks and high speed PHY for 130nm, 90nm and below technologies. - Knowledge in high speed PHY design (PCIE, USB, GbE, DDR, ETHERNET) is an added advantage. - Preferably done some test characterization, measurement and compliance in previous employment
應徵
10/21
台北市內湖區經歷不拘碩士以上
• 進行類比/混合訊號電路模擬(Spice, Spectre...) • 指導及協助Layout規劃佈局 • 撰寫設計、測試規格文件與書寫模擬報告 • 與測試工程師合作測試、驗證、Debug IC • Perform analog/mixed-signal circuit simulations (Spice, Spectre, etc.) • Provide guidance and assistance with layout planning • Write design and test specification documents and simulation reports • Collaborate with test engineers to test, verify, and debug ICs
應徵
10/21
瑞利光智能股份有限公司其他半導體相關業
新竹市經歷不拘大學以上
【職位描述】 設計RVI公司新創的光通訊引擎(Optical Engine)類比電路設計工程師,負責設計、開發、測試、優化和調試類比電路及系統,產品矽中介層、玻璃中介層與高階基板。負責從概念到生產的電路設計,確保光引擎達到品質和性能標準。 【主要職責】 1.設計和開發創新的類比電路和系統,應用於光引擎和相關技術領域。 2.測試、優化和調試類比電路,確保其性能符合設計規範和功能需求。 3.與跨部門團隊合作,包括系統工程師、軟體工程師、光學工程師及其他專業人員,共同實現產品開發目標。 4.與客戶密切合作,理解其需求並提供技術支持和解決方案。 5.制定和執行測試計畫,分析測試數據,並提出改進建議。 6.保持對最新技術趨勢的了解,並將其應用於產品設計中以提升競爭力。 Position Description: As an Analog Circuit Design Engineer at RVI, you will be a key contributor to the development of our next-generation Optical Engine. You will be responsible for designing, developing, testing, optimizing, and debugging analog circuits and systems used in advanced optical communication modules, including silicon interposers, glass interposers, and high-end substrates. This role spans from initial concept to mass production, ensuring the performance and quality of the optical engine meet industry standards. Key Responsibilities: 1.Design and develop innovative analog circuits and systems for optical engines and related applications. 2.Test, optimize, and debug analog circuits to ensure performance meets design specifications and functional requirements. 3.Collaborate with cross-functional teams, including system engineers, software engineers, and optical engineers, to achieve product development goals. 4.Work closely with customers to understand their requirements and provide technical support and tailored solutions. 5.Develop and execute test plans, analyze test data, and propose design improvements. 6.Stay updated on emerging technologies and incorporate relevant advancements into circuit design to enhance product competitiveness.
應徵
10/20
新竹市3年以上碩士以上
1. 類比IP相關功能的設計與實現 ADC, DAC, OSC, PLL, high speed interface...etc. 2. 類比IP設計方法和品質改進 3. 類比IP仿真與分析 4. 與第三方類比 IP 供應商合作 5. 與數位電路作co-sim
應徵
10/20
新竹市經歷不拘碩士以上
Job description Join our innovative team specializing in cutting-edge embedded memory solutions. We are seeking Analog Circuit Engineers to play a key role in the design and development of high-performance embedded DRAM and associated peripheral circuits. In this position, you will be responsible for the complete cycle of DRAM circuit design and simulation verification. Your tasks will involve developing novel circuit topologies, transistor-level design, optimizing performance metrics, and ensuring robust functionality through extensive simulations using industry-standard EDA tools. Required qualifications include a strong technical background in Electrical Engineering, Electronics Engineering, Computer Engineering, Physics, or a closely related field. Candidates must possess demonstrated, significant experience in DRAM circuit design and comprehensive simulation verification methodologies. Ideally, candidates will have proven design experience in specific DRAM-related circuit blocks, including but not limited to: Row and Column Decoder circuits Control path logic DC-DC converters, Charge Pumps, and Bandgap References Delay Locked Loops (DLLs) and Phase Locked Loops (PLLs) Negative voltage generators (NVG) and other critical peripheral circuits This is an excellent opportunity to contribute to state-of-the-art embedded memory designs in a dynamic, collaborative environment. If you are a skilled analog designer passionate about solving complex challenges in DRAM circuitry, we encourage you to apply and help shape the future of embedded memory technology.
應徵
10/17
台北市內湖區經歷不拘碩士以上
Responsible for developing custom IP for SoC design from specification definition, circuit design to testing, and familiar with component and process characteristics.
應徵
10/20
新竹市經歷不拘碩士以上
Job desicription: Our Design Team specializes in the challenging field of Non-Volatile Memory (NVM) IC circuit design. We are actively seeking an experienced Analog Circuit Design Engineer to contribute to our cutting-edge developments in embedded NVM solutions and surrounding circuitry. As a key member of our team, you will be responsible for the design, verification, and debugging of essential analog building blocks like Bandgap references, LDOs, and Charge Pumps. A significant part of your role will involve designing critical memory peripheral circuits for NVM IP and test chips, including Array interfaces, Decoding logic, and Sense Amplifiers. Your responsibilities will span the design lifecycle, from contributing to IP specifications and core circuit design to ensuring performance through layout optimization and comprehensive corner simulations of NVM IPs. We are looking for candidates with proven expertise in analog circuit design, ideally with prior experience in embedded memory or NVM technologies. If you are an experienced analog designer eager to tackle complex challenges in non-volatile memory, we encourage you to apply and help shape the future of memory technology.
應徵
10/22
新竹縣竹北市3年以上碩士以上
1. 顯示驅動IC 類比電路設計 2. 電源管理IC 類比電路設計 3. 高速介面 類比電路設計 4. 觸控類比前端感測類比電路設計
應徵
10/21
新竹縣竹北市5年以上碩士以上
1.Analog front-end design 2.ADC design(Pipelined, SAR, Delta-sigma ADCs) 3.Switched-capacitor circuit design 4. Low EMI techniques 5. Mixed-signal system integration & modeling 6.負責layout floorplan規劃,與layout工程師合作完成相關驗證
應徵
08/27
新竹市1年以上碩士
(1) DRAM電路設計與模擬驗證 (2) 具備DRAM ROW/COLUMN/CONTROL/DC/DLL任一或更多電路設計經驗者佳 (3) 具備verilog經驗者尤佳 (4) 了解基本UNIX操作,具備AWK等Programing能力者尤佳 (5) 具備電機電子資訊物理相關背景,無工作經驗可
應徵
10/21
新竹縣竹北市5年以上碩士以上
1. 參與公司數位後段設計 之產品開發 2. 熟悉與維護 並參與 新流程之開發
應徵
10/23
新北市泰山區3年以上碩士
記憶體power system 設計 『具工作經驗者,薪資另議』
應徵
10/23
新竹縣竹北市3年以上碩士以上
【成為円星人】 円星科技由一群專業與充滿熱情的夥伴創立於2011年,為積體電路矽智財設計服務業之新秀,秉持著『成為半導體業最值得信賴之IP公司』的願景,追求永續經營與成長。 誠摯歡迎您成為円星人,加入我們,站上國際舞台! 一起共同打拚,以精品文化之精神,創造價值,追求卓越! 【職務簡介】 M31主要業務為向 IC 設計業者和晶圓代工廠授權 IP,此職務為負責高速介面 IP(High Speed Interface IP), 包含USB. PCIE, MIPI MPHY, CPHY, DPHY等SERDES IP和類比 IP(Analog IP), 包含ADC, DAC, PLL, PVT sensor的類比IC設計工程師職缺。 【將負責的工作內容】 1. Mixed-Signal & Analog Circuits Design (LDO, OPA, Bandgap, ADC/DAC, etc) 2. High Speed Interface Analog Design (TX, RX, etc) 3. Clocking related:PLL/CDR 【條件與特質】 1. 有類比IC設計工程師相關工作經歷3年以上 2. 電機電子/資訊工程碩士畢業 如果您有以上相關經驗且對此職缺有興趣,歡迎投遞您的履歷!
應徵
10/23
新竹市經歷不拘碩士
We are currently seeking a talented Analog Design Engineer to join our team and participate in the development of Power IC for High-Performance Computing (HPC). The role will primarily involve working on the design and development of the following components: 1. PMIC (Power Management Integrated Circuit) 2. Multiphase VR (Voltage Regulator) 3. Buck/Boost/Buck-Boost Converters 4. eFuse (Electronic Fuse)
應徵
10/20
新竹縣竹北市經歷不拘碩士以上
1. SAR ADC / Current steering DAC/ SDM ADC/ DAC related 2. Analog Baseband related 3. 據有類比整合相關經驗佳
應徵
10/23
新竹市經歷不拘碩士
1.類比/電源管理 IC電路設計. 2.參與LCD PMIC, LED Driver專案. 3.DC-DC, Charger-Pump, LDO, OP, DAC,ADC相關電路設計
應徵