「Product Engineer (Pegasus)」的相似工作

Position Responsibilities Deliver the certification of the Cadence Innovus Platform on cutting-edge foundry process technologies, ensuring optimal performance and reliability. Collaborate closely with Cadence RD and foundry partners to deliver robust, high quality digital design solutions that meet the evolving needs of mutual customers Analysis, communication, and resolution of complex technical challenges encountered by foundry customers, ensuring timely and effective support. Position Qualifications Computer science or EE related Being familiar with Cadence Innovus digital implementation technologies is much preferred Effective interpersonal communication and analytical skills are essential Good communication of oral and written English is required Passion, patience, teamwork, and customer focus. “Can-Do” attitude

Position Description: 1. To provide key technical support in digital IC design implementation, product demonstration, and sales presentations. 2. To demonstrate strong ability and to be hands-on in RTL-to-GDSII design methodology, including both challenging low power and high-performance designs. 3. Have real design experience including floorplan and partition, place, CTS, route, STA timing closure, Physical verification, RC extraction, Power Network analysis. 4. Assist in technical evaluation, assessment and delivery of concurrent ASIC/SoC designs. 5. To play a leading role among other team members, while receive little instruction on routine and general assignments. Position Requirements: 1. A bachelor's degree is essential and 3+ years’ experience in IC design, electronic engineering or computer science applications. 2. Ability to understand and articulate technical issues, (and knowledge of) design products and their applications. 3. Requires working knowledge of one or more programming languages, and effective communication and soft skills. 4. An MS degree and/or working experience in multi-nation IC design house/or familiar with EDI/Innovus product is a plus. 5. Good communication in English and good work attitude. 6. Be familiar with shell/Perl/Tcl etc. script language.

1. Deliver the power analysis (IR-drop/EM) methodology and flow 2. Develop or integrate digital design flow/tools with Cadence methodologies and technologies 3. Collaborate with R&D and customers to deliver high quality Cadence Voltus Platform solutions to mutual customers. 4. To support key customer engagements on the business increase. 5. Have real design experience on Power Network analysis 6. To play a leading role among other team members, while receive little instruction on routine and general assignments. 7. Ability to analyze, communicate and lead resolution of complex technical issues for customers and team members. 8. Proactively seeks more information to address issues/problems. Understands how and where to obtain and utilize resources effectively to resolve issues and problems

* OSAT (Assembly/Test) 良率異常分析 & 處理。 量產測試驗證，確保量測參數 & 規格符合設計要求。 * 測試結果資料分析，提供良率改善 & 測試流程優化建議。 * CP / FT / SLT 數據追蹤，擬定調整製程參數 or 條件。 測試開發、Debug & 參數優化，提升測試效率 & 良率穩定度。 * 與內部製程/設備/品保單位進行問題分析，釐清異常並提出改善方案。 * 支援測試需求 & 技術交流，確保產品測試時程 & 品質達成量產目標。 1. Co-work w/ functional engineering team member (TME/DE/TD/TE/RE) to make new product has good definition, Risk evaluation and Build comprehensive testing plan / Qual plan, etc. 2. Co-work w/ other Engineering team member to ensure all new product can be thoroughly Manufactured, Characterized and Qualified for reliabilities and qualities. 3. Organize assignments and independently schedules to complete assigned tasks timely and make project finished efficiently. 4. Have good Coordination and Data Analysis to solve difficult problems through application of various techniques and approaches to develop effective and practical solutions that result in improved products, processes with good quality. 5. Co-work with MediaTek - Taiwan Team, and HCLTech - India Team. 6. Annual salary: 800K NTD and above 7. Onsite MediaTek - Hsinchu Science Park Office This position is set for PE (Product Engineer) to coordinate new product development activities, ensure timely completion of all new products manufacturing, testing, characterization, qualification and releasing with good consistency, quality and efficiency. Ref. * CP (Wafer level - Chip Probing) * FT (Packaged chip level - Final Test) * SLT (Packaged chip level - System Level Test) * ATE (Automated Test Equipment)

(1)Must have BS in CS/EE of relevant experience in IC design field. (2)Familiar with IC design flow, placement and route (P&R), and layout. (3)Circuit knowledge and logic design relevant experience would be a plus.

1.製造流程建立與SOP撰寫、維護 2.產品導入及問題處置追蹤 3.良率提升及製程優化 4.客訴、不良分析與處置 5.工程變更導入及追蹤. 6.設備治工具開發驗證及維護管理與異常檢修 7.工廠與產品開發人員之間的溝通協調 8.其他主管交辦事項

Introduction GlobalFoundries seeks an experienced Field Application Engineer who will have responsibility for driving new design wins and providing successful tape out support to customers with GlobalFoundries technology. Serve as a customer facing single technical interface to APAC(Taiwan) customers. Your Job Take ownership over GF's technology demonstration and drive design win acquisition strategy and process Serve as single technical interface to customer and coordinate all technical sales interaction Develop customized technical presentations and proposals to assist customers in the evaluation of our solutions Offer most credible representation of strengths and weaknesses of the GlobalFoundries technology (internally & externally) Formulate customer requirements and promote a compelling GlobalFoundries design solution and convey our value proposition Identify and propose solutions to gaps and bottlenecks in the GlobalFoundries product and service portfolio to meet customer requirements Collaborate and leverage GlobalFoundries product marketing/design solutions/technology development teams, and provide real time customer feedback Understand competitive design/technology/product landscape including emerging technology trends and competitive threats Continuously learn about the customer and product, developing relationships, gathering intelligence, uncovering new opportunities Ensure that issues/obstacles/questions to a design win are resolved either directly or by engaging internal experts  Gather, summarize and drive team to close the technical gaps in our offerings that result in design win losses and/or misses in new revenue opportunities Partner with account and sales managers, working to ensure a smooth post-design win transition to Customer Engineering teams Meet design win, tape out, and MPW goals Responsible for aligning customer mature and advanced node tapeout readiness preparation, ex. export control form, IP declaration form, frame table, etc. Ensure that issues/obstacles/questions to a tapeout are resolved either directly or by engaging internal process experts. Support CE (Customer Engineer) on all post-TO activities and requirements. Co-ordinate with customer around Si functionality verification, product performance, design margin and any issues Lead customer design reviews and mock TOs, and responsible for identifying and aligning on all MPW / test chip requirements prior to product design and TO. Own / Collaborate on all tapeout logistics / execution Required Qualifications: Bachelor’s Degree in Electronics/Electrical Engineering or equivalent Minimum 8 years in relevant experience Language Fluency – English and Mandarin (Written & Verbal) Preferred Qualifications:  Master’s Degree in Electronics/Electrical Engineering or equivalent  Relevant Experience Semiconductors (Technology or Design)  E2E experience from concept to Silicon Validation  Excellent communication skills and a strong sales aptitude  Exposure to IC product design and IP required  Exposure and basic competence in design environment/enablement flows and tools  A solid understanding of silicon processing and device physics  Past participation in roles with exposure to or within a foundry highly desirable Strong analytical, technical and project management skills. Minimum 5 years in relevant experience Excellent communication skills Strong analytical, technical and presentation skills

1.新評估項目導入，稽核及品質相關會議安排與執行，有品質管理經驗佳。 2.具有客戶服務意識和了解客戶需求能力，能夠主動回應客戶並提供有效的解決方案。 3.廠商客戶品質問題的處理與回覆、後續的分析追蹤與執行。 4.撰寫與審核8D Report，具備英文撰寫能力及良好跨部門溝通能力，針對品質問題進行追蹤處理。 5.協同維護氣體鋼瓶及化學品更換，氣體及化學產品出貨與倉儲管理。 6.異常排除，緊急應變處理，需多元性發展以協助其他專案報告及設備相關維護活動。 7.主管交辦事務執行。

1.Support and maintain EDA tools and flows used in the digital IC implementation. 2.Design and develop methodologies, automation scripts, and design flow. 3.Manage version control system (Git/SVN), issue tracking system, and CI/CD flow. [Requirement] 1.Python/Perl/TCL/Shell programming skills. 2.Familiar with EDA tools for IC design flow. 3.Basic knowledge of Verilog or SystemVerilog HDL.

1.了解基礎電路設計。 2.測量RF電信。 3.有低良率分析經驗。 4. Characterize and analyze the performance of PA/LNA/Switch and RF Front-end Module. 有以上經驗者佳。

1. BS or MS degree in Electrical Engineering, Computer Science, Physics, Material Science, or equivalent experience. 2. Able to work in Hsinchu and communicate effectively in Chinese and English. 3. Knowledgeable in IC design, semiconductor manufacture, and IC test flow (CP/FT/SLT) details. Good understanding of IC test pattern setup is a plus. 4. Strong data analysis skills and problem-solving ability, with proven records from prior working experience or school projects. 5. Familiar with statistical methods and tools for data analysis. Experience with post-silicon IC measurement data handling is preferred. 6. Excellent writing and verbal communication skills. 7. Your ways to stand out from the crowd: - Able to work with global team members from diverse cultural backgrounds. - Strong collaborative skills, specifically a demonstrated ability to effectively guide and influence within a dynamic environment. - Passionate about the IC yield data analysis along with the advanced semiconductor technology progression.

1. Foundry Tapeout Account 申請。 2. Foundry 製程能力評估和Tapeout 與良率提升。 負責評估Foundry製程能力，Tapeout 作業，持續推動製程優化，進而提升產品良率。 3. 跨單位工程問題協調 代表公司與客戶、Foundry、封裝廠及光罩公司協同解決各項工程相關問題。 4. 產品流程管理與分析 負責從Tape Out、Mask Job Review到產品量產的全流程管理，並進行與協力商處理ESD與Latch Up分析。 5. 封裝評估與導入,與測試數據分析. 6. HTOL QUAL 和 Package QUAL可靠度測試,與RMA分析. 7. 異常問題查證與製程改善 當產品異常發生時，運用EFA/PFA找出低良率原因，並與RD、Fab及Assembly部門協作解決，持續推動製程改善。 8. 熟悉Packaging(WLCSP、wire bond、Molding...)與Testing(CP、FT...)各階段等，知道如何與Test Engineer/外包討論ATE平台、測試coverage、bin split 等議題 9. PDK及相關文件管控 主導PDK及相關文件的申請作業，並與PM/RD團隊密切合作，嚴格控管文件版本，確保資料一致性與最新狀態。 10. 主管交辦事項.

1. Sub-block Layout. 2. Whole Chip IC Layout.

1.PCB測試板工程變更/Debug/Maintain(需要焊接) 2.PCB測試板上機驗証(需PCB維修相關經驗，維修過LB、PC、BIB尤佳) 3.面對客戶、與客戶溝通工程內容

Responsibilities: • Develop integrated verification environment. • Verify designs with system verilog and system verilog assertion. • Build, maintain and upgrade testbenches and their components using UVM-based methods. • Check functional coverage and code coverage • Create controlled random testcases. Pre-debug and provide debug reports. • Scripting experience using scripting languages like Perl and Python.

Ambarella, a worldwide leader in edge AI semiconductors and software, is on a mission to bring artificial intelligence to all types of everyday devices, for enhanced environmental perception in everything from security cameras to robots to autonomous vehicles. In this role, you will be responsible for • DFT implementation (Scan, Compression, MBIST, LBIST, and Streaming Scan Network) from RTL to Post-Production for complex multi-million gate Computer Vision SoC. • Analyze clocking scheme and implement clock control structure for at-speed scan testing • Develop/Generate high-quality scan and mbist patterns. • DFT Verification (including post place-and-route timing simulations). • Work with Product Engineering team to bring up scan & mbist patterns on ATE. • Support silicon production activities including failure diagnosis and test optimization.

【The Role】 The Product development engineer will provide technical solution in Microenvironment mainly focus on FOUP (Front Opening Unified Pod) products through product testing in laboratory and simulation software. This role is ideal for someone who is passionate about mechanical design, problem-solving, and working closely with cross-functional teams to deliver high-quality solutions for the semiconductor industry. 【In this role you will】 • Design and simulate mechanical components using SolidWorks • Develop and test mechanical structures and systems • Develop and test FOUP functions per internal and external requirement • Collaborate with customers to troubleshoot issues, build models, and identify root causes • Work closely with the Sales and MTS teams to align on product requirements and solutions • Support the design team in refining and improving product specifications • Contribute to continuous improvement efforts across product development 【Traits we believe make a strong candidate】 • Bachelor's degree or above in Mechanical Engineering or a related field • 3~5 years of relevant engineering experience • Proficient in SolidWorks, including both design and simulation tools • Hands-on experience with injection molding (required) • Strong mechanical design and testing background • Knowledge or practical experience in CFD (Computational Fluid Dynamics) • Excellent problem-solving and analytical thinking skills • Fluent in English, both written and spoken, with the ability to communicate technical concepts clearly • Strong team collaboration skills; able to work effectively with others, share ideas, and contribute to team success • Self-motivated, detail-oriented, and eager to learn and grow • Experience in the semiconductor industry is a plus • Familiarity with FOUP (Front Opening Unified Pod) systems is a plus 【Your success will be measured by】 • Quality, reliability, and innovation in mechanical design and simulation • Effectiveness in identifying and resolving customer issues • Contribution to cross-functional collaboration with Sales, MTS, and design teams • Timely delivery of project milestones and technical solutions • Impact on product improvement and alignment with customer needs

1. Foundry co-work and contact window. 2. Handle co-development of power, MCU related applications , mass production & yield ramp up . 3. It's better with Foundry process integration or product experience.

Job Description: At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Virtuoso Custom Layout Interactive and Assisted Route team is looking for exceptional individuals skilled in C++ development, IC layout techniques and custom circuit design. You'll focus on Virtuoso interactive and assisted route software development. You're also responsible for implementing, verifying and maintaining physical design software modules for custom integrated circuits in the Advance Node areas of Virtuoso Layout Suite. Requirements: 1) MS/PhD in EE/ECE/CS graduate or BS with at least 2 years software development experience. 2) Strong C++ development and object oriented design skills. 3) Software development experience in EDA is preferred. 4) Experience with UNIX and/or LINUX software development platforms. 5) Good English communication skill. 6) Familiarity with Cadence's Virtuoso layout framework, SKILL language programming or OpenAccess database will be a plus We're doing work that matters. Help us solve what others can't.

Overview: This role is responsible for leading new product initiatives, crafting detailed datasheets, and fostering cross-departmental collaboration. The ideal candidate possesses a deep understanding of IC/MOSFET fabrication, semiconductor testing, and is adept at navigating Power industry nuances. Strong communication skills and self-motivation are paramount. Key Responsibilities: • Steer new product development processes, ensuring timely releases and meticulous schedule management. • Craft and disseminate product datasheets to maintain clarity and accuracy. • Provide steadfast support for Sales & Marketing teams in design-in activities, bridging technical knowledge with market needs. • Oversee product life cycles, encompassing EOL, ECR, and PCN in alignment with product roadmaps and BU strategies. • Ensure production-embedded changes through systematic controls and participate in SCS part creations. • Engage actively with multifunctional teams, crossing from Sales & Marketing, Design, and Quality, to address challenges in fabrication, packaging, testing, and application. • Accomplish additional tasks delegated by the supervisor. Qualifications: • Comprehensive knowledge of semiconductor testing, assembly, and IC/MOSFET wafer fabrication processes. • A strong foundation in electronic analysis. • Exceptional communication and negotiation skills. • A self-starter mindset with readiness for individual contributions. • Experience in the Power industry is a plus.