「技術開發工程師_技術開發部(新竹廠)」的相似工作

1. Device characterization and test key design. 2. 元件量測並提供desinger相關規格數據 3. 記憶體陣列設計

工作概覽： 我們正在尋找具有半導體製程或整合經驗的工程師，主要工作在良率的提升、電性異常分析與改善。理想的候選人應具備半導體物理、元件、IC、及製程知識者尤佳。 主要職責： • 產品良率提升。 • WAT SPC review。 • In-Line 與 WAT 異常分析與改善。 • 新產品Tape out 與導入。 資格條件: • 兩年半導體製程或整合經驗。

Tcad模擬、元件量測與分析

Reporting to MOSFET Development Manager, you will work as Sr. MOS Development Engineer to be responsible for process integration, development and optimization. About the job: Work with product designer to create new device structure ideas and develop the necessary Mosfet/ IGBT /Diode technologies Closely work with internal process experts and external foundry partners to set up the required technologies and processes to produce the prototypes and with test labs to assess results vs. simulations / expected behavior. Responsible for experimental matrix design to evaluate and optimize design vs. specification. Co-work with fab engineering teams to generate the final design rule menu and electrical parametric specifications. Participation in fab selection and evaluation for future foundry locations. Participate and help the Design Engineers and Product Engineers on reverse engineering analysis when necessary. Act as the internal expert of semiconductor devices and processes to provide the necessary information and advices to designers on new technologies. Short term travels for business trips and trainings. About you: Knowledge of semiconductor device physics, such as Diode, BJT, MOSFET, and IGBT…etc and understanding of complex interactions between different fabrication processes. Experiences in semiconductor process development, and basic knowledge in semiconductor device characterization. Ability of arranging tests with 3rd party labs and comfortable with working in Lab for device characterization. Good writing/reading/communication in English is a MUST. The ability to operate independently in a cross-cultural working environment. Experiences in both conventional Bipolar, CMOS, DMOS processe Understanding or experiences in power semiconductor devices assembly and applications would be preferred. Knowledge and experiences of material analysis or Failure analysis tools, such as SRP, SIMS, SEM…etc. Familiar with mask generation, wafer fab process flow and in-line/PCM specifications. Knowledge and experience in one or more of the following areas would be a plus, but not must: o Test pattern generation o Semiconductor process/device modeling o Basic assembly & test processes.

1. 從設計開發階段帶領 SiC 功率元件（如 SiC MOSFET／SBD 等）之製程流程規劃到量產導入。 2. 制定並優化製程模組（EPI／植入／氧化／蝕刻／金屬化／退火／封裝前處理）參數，並監控製程能力以提升良率。 3. 與晶圓代工廠（FAB）及相關製造單位密切溝通技術需求、製程轉移、試產條件驗證及量產交付。 4. 整合設計／製程／封裝／測試團隊，撰寫製程規格書、試產報告及量產流程文件，並負責製程異常分析與改善。 5. 追蹤產品進入量產後的製程效能，提出改善方案以保障產品品質並降低製造成本。

Key Responsibilities: - Responsible for wafer foundry and assembly/testing subcon quality management, to manage all events which subjected to quality issue. - External abnormal reporting handling. Drive subcon on problem solving and failure analysis to determine the root cause of quality incident and bring out CAPA to solve the issue. - Work with subcon and cross function team for MRB case for lot disposition. - Collaborate with subcon and CQE and cross function team to follow and track the 8D report for customer claim/request. - Experienced in handling PCN project for change management as well as CRB and safe launch/ramping up. - Surveyed, managed, evaluated and audited sub-con regularly. - Regularly review subcon quality agenda and performance, drive for continue improvement. - On-site check/audit subcon process/product control and lead on subcon quality improvement. - Liaised between internal team and subcons for quality related subject.

•Design reliability test plan process for device life time evaluation •Coordinate with third party suppliers on device WAT/CP •Coordinate with third party suppliers on reliability test and failure analysis of power devices

1.客訴分析處理與協助廠內改善跟催 2.處理客戶生產加工上所遭遇的問題, 解決並提供協助與對策 3.協助集團公司處理產品可靠度驗證與客訴問題 4.產品可靠度驗證暨產品可靠度監控 5.協助改善可靠度作業流程 6.HTOL/bHAST/PTC burn-in board規劃 7.ISO文件/表單制定及修改 8.其它主管交辦事項

1.新評估項目導入，稽核及品質相關會議安排與執行，有品質管理經驗佳。 2.具有客戶服務意識和了解客戶需求能力，能夠主動回應客戶並提供有效的解決方案。 3.廠商客戶品質問題的處理與回覆、後續的分析追蹤與執行。 4.撰寫與審核8D Report，具備英文撰寫能力及良好跨部門溝通能力，針對品質問題進行追蹤處理。 5.協同維護氣體鋼瓶及化學品更換，氣體及化學產品出貨與倉儲管理。 6.異常排除，緊急應變處理，需多元性發展以協助其他專案報告及設備相關維護活動。 7.主管交辦事務執行。

【工作內容】 • 我們正在尋找具備先進製程經驗的 IC Layout 工程師，加入團隊後可以參與高階SoC /Analog IP 的實體實現，並負責以下工作： -Mixed-Mode FinFET Layout 設計與繪製，確保電路佈局在效能、面積與可靠性之間取得最佳平衡。 -進行 FinFET 製程相關的 DRC / LVS / ERC 驗證，確保設計符合法規與 Foundry 要求。 -熟悉 XRC & EM/IR 分析流程，進行可靠性評估，並針對潛在問題提出改善方案。 【職務條件】 • 必備條件：具備 FinFET 製程經驗，能獨立進行版圖設計與驗證。 -具備類比電路佈局經驗，了解電路特性與佈局考量，能與設計工程師密切合作。 -具備良好的溝通能力與團隊合作精神，能在專案時程內交付高品質成果。

● 光學模組機構設計 ● 光學系統架設與檢測分析 ● 光學系統相關技術專利佈局 ● RF射頻電路設計與分析 ●矽光子產品DC/RF量測與分析

1.微波與功率元件開發工程師，開發並設計新元件 2.設計磊晶與元件結構 3.定義與安排元件特性測試 4.分析元件特性 5.釐清工程問題

請務必投遞官網(13021): https://careers.synopsys.com/job/hsinchu/applications-engineering-staff-engineer/44408/87733350400 You Are: You are an innovative and resourceful engineer with a deep curiosity for solving complex technical challenges at the intersection of hardware and software. With a strong foundation in Electronic Engineering, Computer Science, or a related field, you are adept at leveraging your programming expertise—whether in Python, Tcl, Perl, or similar languages—to streamline and enhance engineering workflows. Your experience within UNIX/Linux environments equips you to navigate high-performance computing scenarios with ease. You thrive in collaborative, cross-functional teams and are energized by the opportunity to work closely with top-tier foundry partners and leading fabless companies. Your keen understanding of physical verification flows—such as DRC, LVS, PERC, FILL, and DFM—sets you apart, and you are eager to deepen your expertise in SoC physical design enablement, process effect analysis, and signoff. You are detail-oriented, capable of producing clear technical documentation, and communicate with clarity and empathy across diverse audiences. What You’ll Be Doing: 1.Delivering advanced physical verification solutions (DRC/LVS/PERC/Fill) for top-tier foundries and key fabless customers, ensuring high-quality silicon signoff. 2.Developing and validating process design kits (PDKs) and verification methodologies in collaboration with R&D and customer teams. 3.Partnering with R&D to innovate and improve Synopsys tools and flows, contributing to the evolution of physical verification technologies. 4.Providing hands-on customer support, troubleshooting issues, and delivering timely resolutions that enhance customer satisfaction and product adoption. 5.Coordinating with internal teams, including product managers and end-users, to align on best practices and ensure seamless integration of new technologies. 6.Documenting technical solutions, validation methods, and customer workflows for knowledge sharing and process improvement. 7.Staying up to date on industry trends and applying new insights to continuously optimize verification processes and tools. The Impact You Will Have: Accelerate the adoption and success of Synopsys physical verification products in leading-edge semiconductor manufacturing processes. Drive the development of robust PDKs and methodologies that enable customers to achieve first-time-right silicon. Enhance the quality and reliability of Synopsys verification tools through direct feedback and collaborative innovation with R&D teams. Strengthen Synopsys’ reputation as a trusted partner to top-tier foundries and fabless customers worldwide. Facilitate faster product cycles and reduced time-to-market for customers by delivering efficient and effective signoff solutions. What You’ll Need: BS or MS degree in Electronic Engineering, Computer Science, or a related field. Proficiency in at least one programming language, such as Python, Tcl, or Perl. Hands-on experience with UNIX/Linux environments and command-line tools. Familiarity with physical verification flows (DRC, LVS, PERC, FILL, DFM) and understanding of complex layout/electrical design rules. Strong investigative, analytical, and problem-solving abilities, with a passion for learning new technologies. Ability to produce clear, concise technical documentation and validation reports. Prior knowledge of tool/runset development/support and experience with SoC physical design is a plus.

1.製造流程建立與SOP撰寫、維護 2.產品導入及問題處置追蹤 3.良率提升及製程優化 4.客訴、不良分析與處置 5.工程變更導入及追蹤. 6.設備治工具開發驗證及維護管理與異常檢修 7.工廠與產品開發人員之間的溝通協調 8.其他主管交辦事項

1. Foundry co-work and contact window. 2. Handle co-development of power, MCU related applications , mass production & yield ramp up . 3. It's better with Foundry process integration or product experience.

1. 具備矽光子相關 EDA 版圖設計軟體 使用經驗（如 Cadence Virtuoso、Synopsys OptoDesigner、Luceda IPKISS 等）。 2. 熟悉矽光子 光學模擬與設計優化，能操作 Lumerical FDTD / MODE / INTERCONNECT 等模擬軟體，並具備量測與驗證能力。 3. 具備矽光子 / 光學測試 / 光學元件開發與設計相關經驗。 4. 具有良好的技術文件撰寫能力，能清楚表達設計思路與實驗結果。

1.ESD/TVS保護元件設計 2.積體電路系統級ESD防護設計 3.等主管交辦事項

* Proficient in Mandarin Chinese(native level) and English. * In charge of customer account * To implement problem-solving processes in the Taiwan organization, and work with the Sales and Service organization on the improvement of product reliability at customer sites, and reduce Cost Of Ownership to our customers * Deliver technical presentation to customers, particularly on details of product design, technology, applications and safety * Regional authority for product selection * Promote new product and coordinate the local resources to manage Loan & Evaluation programmes * Resolve technical and applications issues

Our Purpose: TERADYNE, where experience meets innovation and driving excellence in every connection. We are fueled by creativity and diversity of thought and in our workforce. Our employees are supported to innovate and learn something new every day. We cultivate a culture of inclusion for all employees that respects their individual strengths, views, and experiences. We believe that our differences enable us to be a better team – one that makes better decisions, drives innovation and delivers better business results. Opportunity Overview: • Provides test solutions, test programs development and production support for customers products or IP. • Perform test correlation and data analysis, support release for production. • Provides technical support in sales presentations, product demonstrations. • Provides software/hardware development and consultation. • Develop tools to support customer test program generation and data analysis. • Provides technical expertise and value to customers. • Provide training, test solutions, test program release and troubleshooting to customers via on-site, remote or overseas travel. • Provides answers to customer inquiries concerning system software and applications. • Build application solutions based on customer requirements enhancing the product performance allowing it to become the platform of choice (design-ins). *本公司待遇優,並提供完整培訓計畫,歡迎有半導體測試開發經驗工程師加入本公司行列!

1. 新產品開發驗證以及量產條件的決定 (Corner skew, implant fine tune) 2. 量產品管理及良率(CP/FT)改善 1) Single/Sysematic Low Yield : WAT Correlation, inline tool correlation)分析比對 2) Device fine tune for Yield maintain 3) WAT parameters layout, measurement condition 3. 量產品產品特性分析，客退品分析報告 4. 新技術開發平台開發 (New device development)