新竹市2年以上碩士以上
請務必投遞官網(12438):
https://careers.synopsys.com/job/hsinchu/applications-engineering-staff-engineer-ic-validator/44408/84710683632
You Are:
You are an innovative and resourceful engineer with a deep curiosity for solving complex technical challenges at the intersection of hardware and software. With a strong foundation in Electronic Engineering, Computer Science, or a related field, you are adept at leveraging your programming expertise—whether in Python, Tcl, Perl, or similar languages—to streamline and enhance engineering workflows. Your experience within UNIX/Linux environments equips you to navigate high-performance computing scenarios with ease.
You thrive in collaborative, cross-functional teams and are energized by the opportunity to work closely with top-tier foundry partners and leading fabless companies. Your keen understanding of physical verification flows—such as DRC, LVS, PERC, FILL, and DFM—sets you apart, and you are eager to deepen your expertise in SoC physical design enablement, process effect analysis, and signoff. You are detail-oriented, capable of producing clear technical documentation, and communicate with clarity and empathy across diverse audiences.
What You’ll Be Doing:
1.Delivering advanced physical verification solutions (DRC/LVS/PERC/Fill) for top-tier foundries and key fabless customers, ensuring high-quality silicon signoff.
2.Developing and validating process design kits (PDKs) and verification methodologies in collaboration with R&D and customer teams.
3.Partnering with R&D to innovate and improve Synopsys tools and flows, contributing to the evolution of physical verification technologies.
4.Providing hands-on customer support, troubleshooting issues, and delivering timely resolutions that enhance customer satisfaction and product adoption.
5.Coordinating with internal teams, including product managers and end-users, to align on best practices and ensure seamless integration of new technologies.
6.Documenting technical solutions, validation methods, and customer workflows for knowledge sharing and process improvement.
7.Staying up to date on industry trends and applying new insights to continuously optimize verification processes and tools.
The Impact You Will Have:
Accelerate the adoption and success of Synopsys physical verification products in leading-edge semiconductor manufacturing processes.
Drive the development of robust PDKs and methodologies that enable customers to achieve first-time-right silicon.
Enhance the quality and reliability of Synopsys verification tools through direct feedback and collaborative innovation with R&D teams.
Strengthen Synopsys’ reputation as a trusted partner to top-tier foundries and fabless customers worldwide.
Facilitate faster product cycles and reduced time-to-market for customers by delivering efficient and effective signoff solutions.
What You’ll Need:
BS or MS degree in Electronic Engineering, Computer Science, or a related field.
Proficiency in at least one programming language, such as Python, Tcl, or Perl.
Hands-on experience with UNIX/Linux environments and command-line tools.
Familiarity with physical verification flows (DRC, LVS, PERC, FILL, DFM) and understanding of complex layout/electrical design rules.
Strong investigative, analytical, and problem-solving abilities, with a passion for learning new technologies.
Ability to produce clear, concise technical documentation and validation reports.
Prior knowledge of tool/runset development/support and experience with SoC physical design is a plus.