「(HW Validation) Support Engineer, Staff (3078995)(Zhubei)」的相似工作

Please apply this role through https://careers.synopsys.com/job/hsinchu/r-and-d-engineering-sr-staff-engineer/44408/84900058096 Synopsys is looking for motivated Product Engineer to help design, develop and test state of the art Static Timing, Characterization and Library modelling tools. The primary focus of the Product Engineer is closely working with R&D team, to influence technologies/solution roadmaps and provide R&D team with accurate input from Field AEs, helping them focus on the most critical design challenges and help define solutions to critical problems. The engineer will work closely with Field AEs, ensuring overall consistency of end-to-end design and analysis flow to meet customer needs. The engineer will also work with Sales and Marketing teams to find and develop new markets, drive new tool evaluations and help customers with the adoption and continuous usage of Static Timing, Characterization and Library Modelling, thus enabling Chip Design customers achieve best Timing, Power and Characterization Goals. Synopsys’ existing and forthcoming tools offer an advanced transistor-level static timing characterization and library modelling solution that addresses the existing and emerging challenges in custom and memory design. They offer predictability and improved productivity to designers. Their concurrent timing, SI features and advanced variation aware analysis enables designers to accurately and quickly identify design issues early-on and avoid expensive late-finding of problems in silicon. Main responsibilities: • Drive new products and new product features that exceed customer needs. • Work with RnD to enable timely implementation of new products and features, and important bug fixes. • Provide consultation to prospective users and/or product capability assessment and validation. • Provide tool trainings to customers and Field AEs. • Provides technical expertise to sales staff through sales presentations and product demonstrations. • Assists the sales staff in assessing potential application of company products to meet customer needs and preparing detailed product specifications for the development and implementation of customer applications/solutions. Requirements: We are looking for an innovative, motivated, and dependable person, with at least BS degree and 8+ years of recent hands-on experience including: · Exceptional expertise in transistor-level analysis and debug circuit level issues for SRAM, RF, ROM memories and Standard Cells. · Good exposure to static timing concepts and CMOS engineering fundamentals. · Good knowledge of TCL and or other scripting languages. · Very good communication, social and leadership skills. Plus: · NanoTime or PrimeLib experience highly desirable.

【本職缺僅接受科林研發官方網站投遞】 請至科林研發官方網站投遞個人履歷表，此職缺履歷登錄網址: https://opportunities.lamresearch.com/job-invite/189501/ The intent of this position is to support space planning and management activities for the Taiwan campus portfolio. The Occupancy Planner is part of our on-site Global Occupancy and Space Planning team and will be responsible for space planning, programming, and supporting the team in developing occupancy plans. Also, processing new hire requests, terminations, and weekly move requests, with opportunities in helping to shape and launch space management policies, standards, and processes. Responsibilities: • Build and maintain strong relationships with BU customers to provide excellent customer service • Gather programming requirements to develop project scope, schedule, and budget on office reconfigurations, move, and tenant improvement projects • Provide design layouts of new and existing office space and furniture as needed for move and tenant improvement projects • Working furniture vendors to develop move plans with space assignments, occupancy plans, and furniture reconfiguration requirements • Conduct building audits to verify that employee locations, furniture layout and room configurations are correctly noted on floor plans • Manages relocations including the development and execution of project planning activities, timing of group moves/relocations, and final relocations • Participates in the development and integration of space management tools, processes, standards, and policies to improve efficiencies • Present and negotiate with business units to implement plans aligned with corporate guidelines, including scenarios to optimize use of space while meeting business requirements

By submitting your resume, you’re expressing interest in our 2026 RDSS (Research and Development Substitute Services) program. Please confirm your eligibility with the local district office before applying the role. What you’ll be doing: Communicate between Master planner and factories to meet loading demands. Communicate between internal departments and factories to clarify issues related with spec / rule / definition. Experience in optimizing loading combination for merging and to define rules of implementation in system, work orders releasing and inventory control. Ensure all released WIPs are well executed at the factories and all build plans are meeting the committed SODs and cycle time. Work/communicate with biz planning & Engr on DOE and urgent engineering demands. Continue to drive factory improvement; KPI includes SOD hit rate, cycle time, and efficiency. Drive factories on fixing real world operational problems to make sure execution happens, roadblock removal. What we need to see:  MS of Industrial Engineering or Planning or Business related Skills: Good communication, problem-solving, teamwork, detailed oriented, organizational, quantitative skills, proficiency with business software applications Professional IT skills, Include MS office, excel VBA, excel macro Familiar with ERP function ( especially SAP ) Language: Fluent English on reading, writing, speaking, listening Personality : Organized, self-starter with a strong sense of ownership is a must. Ways to stand out from the crowd: Drive factories on fixing real world operational problems to make sure execution happens, roadblock removal. Excellent communication skills between PE/BP/FP/subcon 

Our Purpose: TERADYNE, where experience meets innovation and driving excellence in every connection. We are fueled by creativity and diversity of thought and in our workforce. Our employees are supported to innovate and learn something new every day. We cultivate a culture of inclusion for all employees that respects their individual strengths, views, and experiences. We believe that our differences enable us to be a better team – one that makes better decisions, drives innovation and delivers better business results. Opportunity Overview: • Provides test solutions, test programs development and production support for customers products or IP. • Perform test correlation and data analysis, support release for production. • Provides technical support in sales presentations, product demonstrations. • Provides software/hardware development and consultation. • Develop tools to support customer test program generation and data analysis. • Provides technical expertise and value to customers. • Provide training, test solutions, test program release and troubleshooting to customers via on-site, remote or overseas travel. • Provides answers to customer inquiries concerning system software and applications. • Build application solutions based on customer requirements enhancing the product performance allowing it to become the platform of choice (design-ins). *本公司待遇優,並提供完整培訓計畫,歡迎有半導體測試開發經驗工程師加入本公司行列!

【產品線描述】 Smart TV Solutions：提供TVSoC、MEMC/FRC及面板相關顯示裝置的控制晶片 ASIC Solutions：提供智能手機、智能電視、電競螢幕、AI Server等產品各種ASIC(包含CoWoS/ChipLet平台)解決方案 【工作說明】 主要負責SoC/ASIC相關: 1. Front-End (Tuner+Demod) 硬體線路設計，Layout review及電性調測 2. 客戶端相關於Front-End的技術支援及PCBA Pre-Test 3. Demod/PCIe/CXL IPs於FPGA及IC的測試平台開發及驗證 4. Analog IP (Demod_ADC. PCIe_PHY..) 相關驗證 5. TCON (CTG, RGB_Capture....) IPs相關驗證 6. PCIe/CXL相關主機/裝置系統相容性測試驗證 【必要條件】 1. 如資工又具備硬體基本技能背景尤佳 2. 相關TV SoC/ASIC開發/驗證/客戶支持工作經驗 3. 熟悉相關射頻(網路/頻譜分析儀)以及R&S SFU/BTC信號產生器, PCIe/CXL協定分析儀..等儀器的使用操作 4. 具自動化程式設計(LabView/MatLab/Python..)開發能力或經驗 5. 具相關TCON 及 PCIe 高速介面及controller(s)驗證經驗者尤佳

由於先進製程與高整合度晶片需要較長的研發時間及高製造成本，DV (Design Verification) 已成為聯發科技晶片開發流程中不可或缺的一環。 CDG DV部門負責開發與執行最高整合度 Smartphone，TV與ASIC驗證工程。 內容包含:整合型驗證環境開發，大數據分析與效能改善，BUS Fabric / EMI (External memory interface ) / Low power functions 驗證規劃及執行。 工作中需要設計及精進Verification plan/methodology/bench，對SOC系統有整體而深入的了解。 利用最新EDA tool and concept來完成你的驗證計畫。 工作地點:新竹/台北

1.類比訊號分析及電路設計。 2.小信號低雜訊放大線路的設計、模擬、量測及驗證。 3.熟悉OPAMP, Filter, ADC/DAC,… 規格, 性能特性及應用。 4.電子電路硬體的設計、驗證，失效分析和故障排除 5.萬潤熱烈招募有意投入設備產業的菁英，如未具備本項職缺所需相關技能與工作資歷者 亦歡迎投遞，薪資另議。 6.上班地點 新竹：新竹市工業東四路24-2號2樓 /新竹縣竹北市保泰三路 78 號 台中：台中市西屯區工業區37路18號 高雄：高雄市路竹區路科十路1號

We are seeking a highly experienced and detail-oriented Senior Hardware Board Development Engineer with 10–15 years of hands-on experience in hardware system design. This role focuses on the development of evaluation boards (EVBs) and customer reference boards (CRB) for advanced SoC/ASIC platforms, including board-level architecture, high-speed signal design, and system bring-up. You will work closely with SoC/ASIC design teams, firmware engineers, and validation teams to deliver robust reference platforms for internal and customer use. The ideal candidate has deep expertise in DDR4/DDR5, PCIe Gen4/5/6, high-speed SerDes, and power delivery networks, along with strong debugging and lab skills. Responsibilities * Lead the design and development of SoC/ASIC evaluation boards, including schematic capture, PCB layout review, and component selection. * Perform board bring-up, signal integrity validation, and system-level debugging. * Collaborate with cross-functional teams to support SoC/ASIC validation and customer reference designs. * Conduct SI/PI simulations and optimize high-speed interfaces (DDR, PCIe, Ethernet). * Generate technical documentation including schematics, BOMs, test procedures, and design guides. * Interface with vendors and manufacturing teams for prototype builds and production support.

## Job Description: - Planning and establishing pass/fail criteria for LEO satellite product testing (e.g., OTA, Thermal Vacuum, Radiation, etc.). - Execution and result analysis of LEO satellite product testing. - Writing test reports and documenting anomalies - Developing and maintaining automated testing programs to improve testing efficiency. ## Skill: - Familiarity with RF or phased array testing is preferred. - Familiarity with Python and basic instrument control is preferred. - Familiarity with military and space testing standards is preferred.

Welcome to apply from NVIDIA Career page: Server: https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/Taiwan-Taipei/Senior-System-Application-Engineer_JR1996786-1 Notebook: https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/Taiwan-Taipei/Senior-System-Application-Engineer_JR1996805 We're Application Engineering team and searching for System Engineer to engage for partner development in ARM-based (Grace CPU) and X86-based servers with NVIDIA solutions. NVIDIA is creating the future of computing and looking for passionate, dedicated, and forward-thinking individuals to help make that happen. What you’ll be doing: - System-level tool development/debug from the product segment needed. - Join the partner design review through system architecture, schematics, and layout, thermal and validation plan. - Work with partners for issue analysis and root cause. - Drive with partner's design quality. - Provide tech training to customers. - Overseas travel will be required if needed. What we need to see: - Master's Degree or equivalent experience in Computer Science/Computer Engineering/Electrical Engineering or related field. - 5+ years of server or PC design work experience. - High-Speed Signal design/ Strong knowledge of GPU Server System Architecture includes X86 and ARM-based. - Familiar with Linux. Good concept of thermal and mechanical design. - Skills of ARM Server System Architecture are a strong plus. Skills of Python/Perl is a plus - Knowledge of the PCIe architecture with AER (Advanced Error Reporting). - Excellent communication skills, flexibility in task assignments, and working under pressure. - Strong communications skills in English, Innovative, Independent, results-oriented problem solver. Ways to stand out from the crowd: -Strong oral & written communication skill (both English and Chinese). -Development experiences in datacenter design or server product. -Self-motivated and aggressive to learn

1、負責治具製作。 1、RF module製作(含layout、 RF 匹配、及文件製作)。 2、RF IC應用測試。 3、協助客戶解決RF系統應用問題。

Position Description: 1. To provide key technical support in digital IC design implementation, product demonstration, and sales presentations. 2. To demonstrate strong ability and to be hands-on in RTL-to-GDSII design methodology, including both challenging low power and high-performance designs. 3. Have real design experience including floorplan and partition, place, CTS, route, STA timing closure, Physical verification, RC extraction, Power Network analysis. 4. Assist in technical evaluation, assessment and delivery of concurrent ASIC/SoC designs. 5. To play a leading role among other team members, while receive little instruction on routine and general assignments. Position Requirements: 1. A bachelor's degree is essential and 3+ years’ experience in IC design, electronic engineering or computer science applications. 2. Ability to understand and articulate technical issues, (and knowledge of) design products and their applications. 3. Requires working knowledge of one or more programming languages, and effective communication and soft skills. 4. An MS degree and/or working experience in multi-nation IC design house/or familiar with EDI/Innovus product is a plus. 5. Good communication in English and good work attitude. 6. Be familiar with shell/Perl/Tcl etc. script language.

1. Firmware and Software development 2. SERDES IP verification 3. System verification

Job Description UltraSense Systems is looking for an experienced and skilled Device Qualification and Reliability Engineering leader for the manufacturing organisation. The role requires both strong technical and a track record of success. You should be comfortable in driving product/device and package qualification and reliability stress testing in order to meet AECQ100 Grade 2 complaincy. You will work closely with customer Engineering to address customer quality issues from yield to reliability by driving “0 PPM”. Responsibilities o Work closely with multi-functional engineering groups and third parties to lead qualification of new products/devices with high quality. Establish plans and manage deliverables. o Drive investigation and resolution on qualification fallouts and product and process nonconformance of MRB, RMA events through means of FA, CAR, 8D, and reporting o Manage customer failure root cause analysis and 8D reporting o Drive Design for Reliability and Design for Test to ensure stress-ability and testability o Lead all aspects of and ensure adequate preparation for qualification including such as corner skew material, BIB/Socket, waveform, electrical bias, thermal effect, lifetime estimation o Perform FAI to ensure critical goals are reviewed before engineering, pre-production and production release for Product Manufacturing o Manage new product/device reliability testing and qualification such as TCT, HAST, and HTOL. o Drive investigation and resolution on qualification fallouts and product and process nonconformance of MRB, RMA events through means of FA, CAR, 8D, and reporting o Evaluate and perform Reliability Risk Assessment o Support PCN or ECN activities Qualifications o BS in EE or Pysics. MS or PhD preferred. >5 Years of relevant industry experience o Silicon engineering experience in the Device/Reliability from multinational companies o Outstanding communication skills required o Experience of silicon product level reliability qualification and lifetime behavior model o Board Level Reliability knowledge preferred o Expertise and working knowledge of commercial and automotive reliability standards (JEDEC, AEC) o Knowledge of reliability stress and test methods, failure mechanism acceleration models. o Good social and communications skills - comfortable working in multicultural teams. o Familiarity with IC components reliability failure modes, mechanisms, and failure analysis techniques preferred

1.系統相關的電路板電子電路設計。 2.系統相關的電路板與設備之應用。 3.依照產品需求與客戶的設計，完成產品的電子電路設計（如：器件選型、原理圖、PCB佈線圖、BOM表)。 4.協助客戶解決原理圖/PCB佈線問題與技術支援。 5.監督、評核外包廠商的品質。 6.協助工程師檢修、測試電路板。 7.電子電路焊接。 8.Design entry HDL。 9.Cadence Allegro。

##職務說明 - 相控陣列系統(通訊/雷達)射頻電路(PA/LNA/Mixer/Filter/PLL)架構規劃、模擬及電路設計。 - 根據系統規格進行電子元件評估與選用。 - 與Layout工程師、結構工程師溝通、協調並完成電路、佈局設計及確認 - 電路板及系統層級效能測試、驗證、除錯並將產品導入量產。 - 執行產品研發流程及技術文件產出 ##技能需求 - 具電路 RF / Analog / Digital 電路三年以上設計經驗 - 熟悉量測儀器使用 - 具備基礎焊接能力

你是否擁有機器視覺系統或AOI設備的相關實務經驗？想加入一個不斷創新且充滿挑戰的團隊嗎？我們正在尋找技術熱忱與解決問題能力兼備的你，歡迎您成為我們成功路上的重要夥伴！ ▲主要職務內容： 1.設計並開發客製化報表輸出與測試分析工具軟體(C#)，根據客戶需求持續優化解決方案。 2.收集並分析客戶新應用的量測/檢測需求，並提出可行的開發建議。 3.向客戶進行測試原理說明及進行機台 Demo 演示，協助他們瞭解解決方案的價值。 4.支援業務/PM提供專業 Proposal，確保解決方案滿足客戶的具體需求。 5.規格內的新應用或樣品(DUT)的測試，確保符合技術標準。 6.協助 R&D 團隊進行軟體設計上的 Debug，提升產品穩定性。 7.參與新應用的治具設計，提升產品設計及測試效率。 8.針對 TE 無法處理的 Recipe，協助建立新樣品的量測參數。 ▲理想人才特質： 1.具備軟體程式撰寫經驗及熟悉統計分析工具 2.具備顯微系統整合經驗及影像處理演算法基礎，使用過 Euresys、Halcon 等工具。 3.善於跨領域協調溝通，願意面對新興產業中的光學量測需求並提出解決方案。 4.能夠分析現有產品的技術問題，及時提出解決方案建議。 5.具備良好的英文或日文溝通能力。 ▲加入我們的團隊，您將持續向前： 1.持續學習與成長的機會：參與前沿技術項目，拓展你的技術能力。 2.國際視野的提升：出差機會讓你接觸全球市場，提升職業競爭力。 3.成長導向的工作環境：重視專業發展，鼓勵創新與技術突破，激發你的潛力。 立即申請這個充滿挑戰性和成長潛力的FAE工程師職位，和我們一起引領機器視覺技術的未來！

1、IC驗證。 2、OLT,ESD,CE/FCC測試。 3、文件整理製作。 4、程式維護。

工作項目： 1. Camera firmware 負責同仁，專門處理 Tier 1 Customer firmware的需求 2. Camera firmware 底層開發，專門處理 Customer function 到 Git 的整合和標準化 3. Camera AI feature開發，專門處理Customer的AI應用 應徵條件： 1. 碩士以上，電機工程、電信工程、電控工程、電子工程、資訊工程、資訊科學、動力機械、自動控制、通訊工程相關科系畢業為主 2. 熟悉 C , C++ , Python , Git, Python 3. 熟悉 Scope , USB Analyzer , I2C Analyzer 4. 具3年以上下列相關經驗者佳： -熟悉 USB 協議和相關產品及USB Camera 相關 firmware 控制 -熟悉 firmware code compiler 環境及控管軟體 -了解 Camera ISP Pipeline 及 PC Camera相關 feature -具備基本 Hardware debug (GPIO / I2C etc..) 能力 相關經驗者為佳。

1. 寬頻IC相關參考電路設計與公板製作。 2. 寬頻IC相關系統測試板設計製作。 3. 寬頻系統硬體相關驗證測試，ex. Power ripple, XTAL driver level, Thermal, 電氣訊號量測/TCT/… 等硬體相關的測試內容。 4. 產出硬體設計文檔與測試報告，客戶設計支持。 5. EMC 相關測試與 debug。