「Custom Design Automation Engineer EM/IR Flows (3078527)」的相似工作

Please apply this role through https://careers.synopsys.com/job/hsinchu/r-and-d-engineering-sr-staff-engineer/44408/84900058096 Synopsys is looking for motivated Product Engineer to help design, develop and test state of the art Static Timing, Characterization and Library modelling tools. The primary focus of the Product Engineer is closely working with R&D team, to influence technologies/solution roadmaps and provide R&D team with accurate input from Field AEs, helping them focus on the most critical design challenges and help define solutions to critical problems. The engineer will work closely with Field AEs, ensuring overall consistency of end-to-end design and analysis flow to meet customer needs. The engineer will also work with Sales and Marketing teams to find and develop new markets, drive new tool evaluations and help customers with the adoption and continuous usage of Static Timing, Characterization and Library Modelling, thus enabling Chip Design customers achieve best Timing, Power and Characterization Goals. Synopsys’ existing and forthcoming tools offer an advanced transistor-level static timing characterization and library modelling solution that addresses the existing and emerging challenges in custom and memory design. They offer predictability and improved productivity to designers. Their concurrent timing, SI features and advanced variation aware analysis enables designers to accurately and quickly identify design issues early-on and avoid expensive late-finding of problems in silicon. Main responsibilities: • Drive new products and new product features that exceed customer needs. • Work with RnD to enable timely implementation of new products and features, and important bug fixes. • Provide consultation to prospective users and/or product capability assessment and validation. • Provide tool trainings to customers and Field AEs. • Provides technical expertise to sales staff through sales presentations and product demonstrations. • Assists the sales staff in assessing potential application of company products to meet customer needs and preparing detailed product specifications for the development and implementation of customer applications/solutions. Requirements: We are looking for an innovative, motivated, and dependable person, with at least BS degree and 8+ years of recent hands-on experience including: · Exceptional expertise in transistor-level analysis and debug circuit level issues for SRAM, RF, ROM memories and Standard Cells. · Good exposure to static timing concepts and CMOS engineering fundamentals. · Good knowledge of TCL and or other scripting languages. · Very good communication, social and leadership skills. Plus: · NanoTime or PrimeLib experience highly desirable.

Position Description: 1. To provide key technical support in digital IC design implementation, product demonstration, and sales presentations. 2. To demonstrate strong ability and to be hands-on in RTL-to-GDSII design methodology, including both challenging low power and high-performance designs. 3. Have real design experience including floorplan and partition, place, CTS, route, STA timing closure, Physical verification, RC extraction, Power Network analysis. 4. Assist in technical evaluation, assessment and delivery of concurrent ASIC/SoC designs. 5. To play a leading role among other team members, while receive little instruction on routine and general assignments. Position Requirements: 1. A bachelor's degree is essential and 3+ years’ experience in IC design, electronic engineering or computer science applications. 2. Ability to understand and articulate technical issues, (and knowledge of) design products and their applications. 3. Requires working knowledge of one or more programming languages, and effective communication and soft skills. 4. An MS degree and/or working experience in multi-nation IC design house/or familiar with EDI/Innovus product is a plus. 5. Good communication in English and good work attitude. 6. Be familiar with shell/Perl/Tcl etc. script language.

Digital IC design engineer - Familiar with Verilog RTL coding - Familiar with digital design flow (pre-layout simulation, timing constraint, synthesis, post-layout simulation) - Will be working on high speed Serdes IPs - Experience or interest in all-digital PLLs or clock-data recovery circuits is a big plus

【產品線描述】 專注於提供高效能高品質的IC解決方案，涵蓋TV SoC及ASIC領域，並透過深厚的軟體技術優勢，確保產品的市場競爭力。 ■ TV SoC 軟體解決方案： 智慧電視系統整合、影像與音訊處理優化、AI 影像增強、多媒體與串流服務支援 ■ ASIC 軟體解決方案： 高效能低功耗設計、相機與影像處理技術、深度學習推理引擎、高效能計算架構、開發工具鏈 【工作說明】 1. 軟韌體開發 2. 協同客戶開發建構Smart TV 系統 3. 單晶片系統整合 【必要條件】 1. 碩士以上，電子、電機、資工、控制.. 等理/工學院相關科系畢業 2. 具備程式開發能力 3. 能配合工作需求出差

1.系統相關的電路板電子電路設計。 2.系統相關的電路板與設備之應用。 3.依照產品需求與客戶的設計，完成產品的電子電路設計（如：器件選型、原理圖、PCB佈線圖、BOM表)。 4.協助客戶解決原理圖/PCB佈線問題與技術支援。 5.監督、評核外包廠商的品質。 6.協助工程師檢修、測試電路板。 7.電子電路焊接。 8.Design entry HDL。 9.Cadence Allegro。

【在華邦，學習不設限，讓AI技術力與你的未來力同步成長!】 我們深信「人才永續」是企業創新的核心動能。華邦持續投資於數據素養與AI應用的培育，支持每一位人才掌握AI與數據應用的核心能力。 ．內部學習平台提供超過4,000堂線上課程，其中包含近850堂資料科學、人工智慧、數據思維與程式技術等多元主題，支援彈性自主學習 ．建立跨部門的 AI實作班與技術社群，定期舉辦研習與交流活動，讓知識轉化為實戰力 ．完善數據應用學習資源，結合資料呈現(Power BI、Tableau)、資料處理(Python、JMP)、流程自動化(Power Automate、UiPath)、AI助手(Copilot)，協助同仁有效以數據驅動決策與創新。 ．搭配專業語言學習平台，提供學習補助與資源，鼓勵同仁持續進修，拓展國際視野 無論你是技術新秀還是資深專才，華邦鼓勵所有領域都能與AI結合，與國際接軌。持續精進、突破自我！ 【邀請您將104履歷同步上傳至華邦官方網站，將使您的履歷優先被主管看見】此職缺履歷登錄網址:https://bit.ly/4mmbZ92 [工作內容] 1. Develop and maintain DRC related Calibre SVRF/TVF rule deck and tech file. 2. Develop and maintain dummy-fill utility to enlarge margin of processes. 3. Support designer/layout to fix design rule related issue. 4. Maintain Laker GUI for layout users. 5. Build and optimize automation flows (Python/TCL/Perl).

【工作內容】 • 我們正在尋找具備先進製程經驗的 IC Layout 工程師，加入團隊後可以參與高階SoC /Analog IP 的實體實現，並負責以下工作： -Mixed-Mode FinFET Layout 設計與繪製，確保電路佈局在效能、面積與可靠性之間取得最佳平衡。 -進行 FinFET 製程相關的 DRC / LVS / ERC 驗證，確保設計符合法規與 Foundry 要求。 -熟悉 XRC & EM/IR 分析流程，進行可靠性評估，並針對潛在問題提出改善方案。 【職務條件】 • 必備條件：具備 FinFET 製程經驗，能獨立進行版圖設計與驗證。 -具備類比電路佈局經驗，了解電路特性與佈局考量，能與設計工程師密切合作。 -具備良好的溝通能力與團隊合作精神，能在專案時程內交付高品質成果。

【產品線描述】 Smart TV Solutions：提供TVSoC、MEMC/FRC及面板相關顯示裝置的控制晶片 ASIC Solutions：提供智能手機、智能電視、電競螢幕、AI Server等產品各種ASIC(包含CoWoS/ChipLet平台)解決方案 【工作說明】 主要負責SoC/ASIC相關: 1. Front-End (Tuner+Demod) 硬體線路設計，Layout review及電性調測 2. 客戶端相關於Front-End的技術支援及PCBA Pre-Test 3. Demod/PCIe/CXL IPs於FPGA及IC的測試平台開發及驗證 4. Analog IP (Demod_ADC. PCIe_PHY..) 相關驗證 5. TCON (CTG, RGB_Capture....) IPs相關驗證 6. PCIe/CXL相關主機/裝置系統相容性測試驗證 【必要條件】 1. 如資工又具備硬體基本技能背景尤佳 2. 相關TV SoC/ASIC開發/驗證/客戶支持工作經驗 3. 熟悉相關射頻(網路/頻譜分析儀)以及R&S SFU/BTC信號產生器, PCIe/CXL協定分析儀..等儀器的使用操作 4. 具自動化程式設計(LabView/MatLab/Python..)開發能力或經驗 5. 具相關TCON 及 PCIe 高速介面及controller(s)驗證經驗者尤佳

1. 負責後段APR flow 　 Familiar Netlist-to-GDS Design flow. Including,Floorplan/Power Plan/IR drop analysis、Placement/CTS/Route、Timing Analysis . 2. Physical Verification. Including, -DRC/LVS to tapeout. 3. 負責與客戶做設計服務的技術討論 4. 作為Project leader與APR團隊合作完成專案 5. 對IP survey有一定程度的了解為佳

1. 寬頻IC相關參考電路設計與公板製作。 2. 寬頻IC相關系統測試板設計製作。 3. 寬頻系統硬體相關驗證測試，ex. Power ripple, XTAL driver level, Thermal, 電氣訊號量測/TCT/… 等硬體相關的測試內容。 4. 產出硬體設計文檔與測試報告，客戶設計支持。 5. EMC 相關測試與 debug。

1.類比訊號分析及電路設計。 2.小信號低雜訊放大線路的設計、模擬、量測及驗證。 3.熟悉OPAMP, Filter, ADC/DAC,… 規格, 性能特性及應用。 4.電子電路硬體的設計、驗證，失效分析和故障排除 5.萬潤熱烈招募有意投入設備產業的菁英，如未具備本項職缺所需相關技能與工作資歷者 亦歡迎投遞，薪資另議。 6.上班地點 新竹：新竹市工業東四路24-2號2樓 /新竹縣竹北市保泰三路 78 號 台中：台中市西屯區工業區37路18號 高雄：高雄市路竹區路科十路1號

Overview: The Senior TCAD Engineer will be a key member of our technology development team, responsible for advanced modeling and simulation of semiconductor devices and fabrication processes. This role involves defining and executing TCAD projects for novel device architectures, optimizing performance, and analyzing results to guide process integration and design teams. Key Responsibilities: • Develop and validate TCAD models for advanced technology nodes. • Run simulations to assess device performance (IV, CV, breakdown, reliability). • Interpret results to guide design and process improvements. • Collaborate with engineering teams to align on technology roadmap. • Act as TCAD expert and provide technical support. • Automate simulation tasks using scripting (Python, Perl, TCL). • Compare simulations with silicon data and resolve discrepancies. • Prepare technical reports and present to cross-functional teams. • Stay updated on TCAD trends and enhance modeling capabilities. • Mentor junior engineers and contribute to IP development. Qualifications: • 5+ years of hands-on experience in TCAD process and device simulation within the semiconductor industry. • Deep understanding of semiconductor device physics and fabrication processes. • Expertise with commercial TCAD simulation tools such as Synopsys Sentaurus or Silvaco Atlas. • Proficiency in scripting languages (e.g., Python, Perl, TCL) for tool automation. • Experience with analog focused process technologies, particularly high voltage transistors such as drain extended CMOS or LDMOS devices.

(1)Circuit Design. (2)Circuit Simulation. (3)Layout Verification. (4)Silicon verification and debugging. (5)Transfer design to production.

Position Description Develop PEGASUS/PVS DRC, FILL, LVS, LPE rule decks and RCX flow for worldwide foundries. Manage onsite technical qualification to ensure both PEGASUS/PVS decks and tools are officially qualified by foundries. Collaborate closely with early adoption customers to track and resolve product issues Establish communication channels with R&D to capture customer needs and requirement spec. Work with R&D to enhance and improve PEGASUS/PVS, positioning it as a leading edge Physical Verification tool Position Requirements B.S. in Electrical Engineering (EE), Computer Science (CS), or related area (or equivalent) and 3 - 5 years of experience with Physical Verification tool support/development OR M.S. in EE or CS, or related area (or equivalent) and 1 - 3 years of experience with Physical Verification tool support/development Profound knowledge with Foundry Design Rules and semiconductor fabrication process Ability to develop PEGASUS/PVS rule deck for worldwide foundries, ensuring quality, performance, and compliance with schedules and qualification requirements. Proficiency in TCL and PERL scripting is required Strong English communication skills. Software development experience preferred; familiarity with Cadence SKILL programming is a plus. Experience with IC design and CAD support is advantageous.

1. SRAM library characterization flow. 2. SRAM library maintaining. 3. Develop and maintain automation flows for analog IC design.

【產品線描述】 ASIC Solutions專注於提供高效的應用特定集成電路（ASIC）解決方案，涵蓋智能手機影像信號處理（ISP）、獨立顯示處理器、遊戲機、增強現實（AR）與虛擬現實（VR）設備，以及人工智慧生成內容（AIGC）等領域。 我們的設計不僅提升產品性能，還有效降低功耗，延長設備使用壽命。專業團隊根據客戶需求提供量身定制的方案，確保在性能和成本效益上達到最佳平衡。選擇ASIC Solutions，共同推動科技未來。 【工作說明】 軟/韌體開發人員： 1. FPGA, IC, IP驗證 2. 軟韌體系統規劃及開發 3. 軟韌體穩定性測試, 自動化測試 4. 功耗分析與優化 5. 規格討論 硬體開發人員： 1. FPGA, IC, IP/AIP 驗證 2. 生產測試硬件規劃及開發 3. 系統/IC 穩定性測試, 功耗量測 4. 封裝評估 5. 規格討論 【必要條件】 1. 電子、電機、資工相關科系畢業 2. SoC軟韌體及硬體開發經驗

▋ 關於德州儀器 德州儀器(TI)是位居類比晶片世界領導地位的半導體設計與製造公司，持續提供創新及頂尖的半導體技術與產品，協助客戶開發最先進的電子產品。除此之外，TI也針對在校學生及初入社會新鮮人設計完整的培訓制度與挑戰性的工作內容，並提供具競爭力的薪資與福利、完善的升遷管道、輪調培訓計畫以及活潑與國際化的工作環境。 ▋ 應用工程師職務說明 >>在TI做FAE，您可以… • 參與FAE完整培訓計畫，包含1對1 coach、豐富教育訓練資源 • 與全世界專家合作，參與跨國會議及海內外輪調計畫，在國際舞台成長 • 接觸TI多元產品線，包含熟悉的#消費性電子 、時下最夯的#車用電子 ，以及工業用等產品 • 透過專案及團隊合作，快速累積技術硬實力及溝通軟實力 • 享受開放扁平的組織氛圍，不論是專業領域或職涯發展，都能夠勇敢表達 • 走出多元職涯，不論是技術導向的技術專家(technical ladder program) 或是領導團隊的用人主管，TI提供暢通的升遷管道讓您有機會被全世界看見 >>FAE在做什麼 作為“Technical Expertise”，與Technical Sales Engineer併肩合作，了解客戶的技術需求、解決客戶的技術痛點，將TI產品特性與客戶系統需求聯結起來。運用產品選擇、系統、實現和調試方面的技術能力，從而實現業務目標。 • 積極與客戶建立關係，及時掌握客戶開案訊息，進而瞭解其需求與系統設計，推展TI的產品讓客戶的設計更有市場競爭力。 • 透過TI全球技術資源，提供專業技術服務，解決TI產品應用在客戶系統上的技術問題，協助客戶順利導入量產。 • 了解TI系統及產品，並研究同業競爭的狀況，反應客戶需求及市場資訊給研發團隊做為未來產品開發的參考。 ▋ 科技菁英計劃 - TI 應用工程師輪調培訓計畫 有思考過RD之外的另一種職涯可能嗎? 喜歡與人互動並充滿挑戰的工作卻又擔心新鮮人無法立即上手嗎? 別擔心! TI針對FAE新鮮人提供海內外全面且扎實的系列培訓課程， 透過課堂及工作日常的任務的學習，您將具備FAE應具備的各項知識與技能，在客戶面前成為專業與自信的FAE！ 另外，TI亦提供完整的輪調計劃，透過給予新人不同職務內容的學習， 使其能在公司有更多成長及發展的機會。 Business Summary: • New Hire Orientation & Field Sales Office Rotation • Gain basic understanding of TI, our products, the program itself, how to navigate corporate life, and your first taste of sales tools and skills. • Basic understanding of the FAE role, inclusive of relationship building, sales processes, tools and all things relevant to account growth, technical skills, and TI product knowledge • Understand the different roles in the sales office, the customer markets and end equipment, and expectations of a good FAE. Develop an understanding of what makes the various roles successful. • Learn the working models of successful partnerships, and understand the importance of each business process. • Systems Engineering & Marketing rotation • Understand key EE/subsystem design challenges and build collaboration with Sales & BU to support customer and win business • Utilize sales tools and TI.com systems content to become more efficient and effective during Sales process • Understand SEM’s role & responsibility, and how field, BU, and SEM work together to find more and win more 看更多徵才資訊與FAE工作介紹=>https://drive.google.com/file/d/14OG1-iePlNZ8wYJYcnFohLzfBShGg4Th/view?usp=sharing 歡迎至TI職涯官網 https://careers.ti.com/students/ 看更多內容 #R&D外的另一種選擇 #IC Design的另一種選擇 #結合技術及與人溝通 #探索不同產品之技術與應用 #走出多元彈性的職涯 #年薪(含紅利)百萬起跳!

歡迎2026年畢業並正在找尋研發替代役的同學申請! 職位選擇: Direction 1: Physical Design Engineer Direction 2: ASIC Physical Design Engineer Direction 3: DFX Engineer Direction 4: CAD Tools Development Engineer Direction 5: Design Verification Engineer What you’ll be doing: Key Domains: • Physical and ASIC Design Implementation • Backend and Layout Optimization • Design-for-Excellence (DFX: Test, Manufacturability, Debug) • Development of CAD/EDA Automation Tools • Functional and Formal Design Verification What we need to see: • MS degree from EE/CS or related majors from a prestigious university. • Good knowledge in digital circuit design. • Experience in using Verilog HDL. • Experience in various EDA tools. • Fluent in English reading and writing. • Self-motivated, good team player. Ways to stand out from the crowd: • Proven ability to work independently as well as in a multi-disciplinary group environment • Good command of C/C++ or Verilog programming language. • Familiar with Perl/Python/Tcl/Shell scripting 應徵方式: 請提供以下資料： • 英文個人履歷 • 學士+碩士成績單 (中英文皆可) 提交申請: 請將上述資料投遞至104，符合資格者將會收到進一步的聯繫通知。

1.Communicate with customer/partner and subcontractor to define the package design requirements, or specifications. 2.Propose the package size, structure according to requirements and specifications from customer. 3.Design the package and optimize to meet product specifications, coworking with related layout, electrical and thermal engineering teams. 4.Prototyping document preparation 5.Link with suppliers and follow up the development trend.

1. 協助客戶問題釐清及解決, 處理客戶訴願 2. 協助業務推展 3. USB/SATA/PCIe/Ethernet/Serdes電器特性量測