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5/03 類比IC設計工程師

  • 台北市信義區
  • 6年以上
  • 碩士

1. 高速介面電路設計 2. 負責Serdes PHY Ex. MIPI/PCIE PHY的開發與維護工作 3. 類比IP設計(EQ, CDR, OP, OSC, Regulator, BandGap, ...)

待遇面議
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0~5人應徵

5/03 IC Architect -Cybersecurity (新竹/內湖)

  • 台北市內湖區
  • 3年以上
  • 大學

1. 研究V2X與人機介面可能面臨之安全攻擊 2. 研究底層實體網路可能面臨之安全攻擊 3. 研究重要資料與軟體/韌體之可能安全漏洞 4. 針對車用所需網路安全提出防護機制 5. 實作關鍵防護機制之軟硬體

待遇面議
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0~5人應徵

5/02 資深數位IC設計工程師

  • 台北市內湖區
  • 5年以上
  • 碩士

(1) 研讀專案相關規格書,然後對於專案所需要的功能進行RTL code設計。 (2) 對於該功能RTL code進行模擬與各項確認驗證。 (3) 對於整體ASIC進行FPGA系統驗證。 (4) 產生邏輯元件檔案並且做相關之時序檢驗與確認。

待遇面議 員工72人
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0~5人應徵

5/02 DMOS 資深研發工程師 Senior Design Engineer (新竹/台北)

  • 台北市內湖區
  • 5年以上
  • 碩士

Overall Purpose of Position: This position is responsible for MOSFET designs. Primary functions include: • Power device structure and process simulation with TCAD tools including Tsuprem4, Medici, and Sentaurus. • Device characterization with LCR meter, curve tracer, FET test, etc. • Layout design for power devices with L-edit. • Work closely with the marketing, packaging, product engineering, and integration groups to design, develop, and launch new products and next generation platforms.

待遇面議 外商公司
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0~5人應徵

5/02 IC Application Engineer / Analog (歡迎具類比IC經驗者)

  • 台北市松山區
  • 2年以上
  • 大學

Job Description : 1. Work closely with the customer, to help them solve the problem in design. 2. Ability to analyze, communicate and lead resolution of complex technical issues for customers and team members. 3. Provide the onsite/online technical consulting of Cadence analog IC solution.

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0~5人應徵

5/02 Analog IC Design Senior Engineer

  • 台北市南港區
  • 3年以上
  • 大學

Job Description: (1) Familiarize with high speed serial link circuit design. (2) Serdes design including RX CTLE/DFE, clock/data recovery circuit, TX driver. (3) High frequency low jitter phase-locked loop design. (4) High speed IO design. (5) High speed ADC/DAC design. (6) Analog and RF circuit design. KaiKuTek is the world's leading provider for 3D gesture sensor using mmWave Radar with embedded AI accelerator. We possess key technologies in areas such as Antenna-in-Package (AiP), ML algorithm, AI accelerator, as well as 60 GHz radar transceiver design. With recent merger by JMicron, founded in 2001 and located in Hsinchu Science Park, our product portfolio expands to high speed SerDes bridge controller SOC's mainly in storage application utilizing USB, PCIe, and SATA. This new sensing technology will change and redefine human-machine interface as we know today, and mmWave technology combined with high speed SerDes will open door to many new possibilities and application frontiers. KaiKuTek is looking for enthusiastic Analog IC Design developers willing to take upon new challenges of working closely with cross functional teams, including digital IC designers, antenna/packaging engineers, hardware engineers, software and firmware engineers, production and testing as well as marketing and FAE, to optimize the overall SoC performance in terms of power, area, functionality, testability as well as to create proof-of-concept for new customer engagement.

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0~5人應徵

5/02 CAD Engineer

  • 台北市南港區
  • 2年以上
  • 大學

Job Descriptions: -To establish and manage central libraries, and validate simulation flows. -To work with different technology nodes and provide flows/methodologies. -To guide and assist designers to solve tool issues. -To develop in-house EDA/CAD flow solutions. KaiKuTek is the world's leading provider for 3D gesture sensor using mmWave Radar with embedded AI accelerator. We possess key technologies in areas such as Antenna-in-Package (AiP), ML algorithm, AI accelerator, as well as 60 GHz radar transceiver design. With recent merger by JMicron, founded in 2001 and located in Hsinchu Science Park, our product portfolio expands to high speed SerDes bridge controller SOC's mainly in storage application utilizing USB, PCIe, and SATA. This new sensing technology will change and redefine human-machine interface as we know today, and mmWave technology combined with high speed SerDes will open door to many new possibilities and application frontiers. KaiKuTek is looking for enthusiastic CAD developers willing to take upon new challenges of working closely with cross functional teams, including MMIC/RFIC designers, digital IC designers, antenna/packaging engineers, hardware engineers, software and firmware engineers, production and testing as well as marketing and FAE, to optimize the overall SoC performance in terms of power, area, functionality, testability as well as to create proof-of-concept for new customer engagement.

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0~5人應徵

5/02 類比IC設計-技術主管/資深工程師 (台北/新竹)

  • 台北市內湖區
  • 8年以上
  • 大學

1. 有USB3.1 TX/RX PHY, CDR, PLL, CTLE, DFE, FFE 的經驗 2. MIPI PHY IP 設計經驗 3. Tapeout experience on 28nm or below 4. 技術指導及專案管理 *第1、2項經驗擇一即可 *可於台北/新竹辦公

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0~5人應徵

5/02 MMIC/RFIC Design Engineer

  • 台北市南港區
  • 3年以上
  • 大學

Job Requirements: Master or PhD degree in EE is required as a minimum from a reputed college. Experienced in CMOS LNA, Mixer, PA. T/R Switch block design and trade-offs Experienced in CMOS VCO, DCO, ILO, Frequency divider/multiplier block design and trade-offs Experienced in CMOS Synthesizer/FracN PLL with wideband modulation techniques Experienced in passive component design using EM tools -- transmission line, transformer, inductor, coupler, etc. Familiar with basic CMOS analog circuit blocks such as PGA, OPAMP, LDO, ADC/DAC Familiar with basic CMOS digital logic design Familiar with digital/analog Sigma Delta design concepts Written and verbal communication/documentation skills. Ability to profile the values, requirements, issues, risks, and solutions for engineering works. Fast-learner, motivated to work in startup environment. KaiKuTek is the world's leading provider for 3D gesture sensor using mmWave Radar with embedded AI accelerator. We possess key technologies in areas such as Antenna-in-Package (AiP), ML algorithm, AI accelerator, as well as 60 GHz radar transceiver design. With recent merger by JMicron, founded in 2001 and located in Hsinchu Science Park, our product portfolio expands to high speed SerDes bridge controller SOC's mainly in storage application utilizing USB, PCIe, and SATA. This new sensing technology will change and redefine human-machine interface as we know today, and mmWave technology combined with high speed SerDes will open door to many new possibilities and application frontiers. KaiKuTek is looking for enthusiastic MMIC/RFIC developers willing to take upon new challenges of working closely with cross functional teams, including digital IC designers, antenna/packaging engineers, hardware engineers, software and firmware engineers, production and testing as well as marketing and FAE, to optimize the overall SoC performance in terms of power, area, functionality, testability as well as to create proof-of-concept for new customer engagement.

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0~5人應徵

4/30 類比IC設計(資深)工程師 (台北)

  • 台北市南港區
  • 經歷不拘
  • 碩士

1. 類比IC設計之相關電子電機科系研究所畢業。 2. 具類比IC產品設計經驗尤佳。 3. 具製程和功率元件知識更棒。 4. 任職後可能會接觸基礎類比電路方塊、DC/DC, ADC,and FiIter等類比IC電路分析、設計和驗證等相關工作。

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0~5人應徵

4/29 IC設計實體驗證工程師

  • 台北市信義區
  • 經歷不拘
  • 專科

上班地點:台北信義區/新竹科學園區/台中地區 LVS engineer requires the following abilities : - know basic semiconductor process. - realize how semiconductor devices are manufactured. - have the skills of editing programs on Unix system. - Familiarity with programming is a plus. 相關課程 : - Physics of Semiconductor Devices - VLSI Device and Technology - Introduction to Semiconductor Process - Programming ( Perl, Python ).

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11~30人應徵

4/29 類比IC設計資深工程師

  • 台北市大安區
  • 經歷不拘
  • 碩士

振生半導體股份有限公司 (Jmem tek) 專注於半導體相關矽智財,提供設計服務與硬體資安專利,保護硬體資訊安全。如果您希望參與一個充滿潛力和創造力的環境,歡迎您加入我們的團隊。 工作內容: • 混合訊號處理 (ADC, DAC, PLL) • 設計與開發PMIC相關電路 (Charge pump, LDO...) • 開發High power domain 電路與 core voltage domain 電路整合 • 晶片整合並完成晶片驗證與T/O 我們期望您具備的條件: • 有power相關電路開發經驗者。 • 3年以上工作經驗為佳。 • 有專案經驗者佳。 • 有Security IP (Ex: PUF, TRNG) 開發經驗者佳。 相關報導: 數位時代:陽明交大出身的Jmem Tek的硬體資安技術有何特別? https://meet.bnext.com.tw/articles/view/50065 DIGITIMES Asia報導:Chip startup JMEM TEK safeguards data security with hardware-software solution https://www.digitimes.com/news/a20221223VL202.html

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0~5人應徵

4/29 Manager/Teamleader IC Design - Taipei Office

  • 台北市內湖區
  • 10年以上
  • 大學

Development: ‧ Assist management team in IC roadmap and product definition specification. ‧ Manage a team of IC designer with responsibility to bring design to production. ‧ Perform as project manager to lead project execution. ‧ Perform IC specification and RTL design. ‧ Perform design verification, building testbench and testcases. ‧ Perform design code review and maintain design quality. ‧ Perform top-level integration and support backend activities for tape-out. ‧ Perform system validation through FPGA prototyping. ‧ Support Silicon validation and IC production. ‧ Perform design documentation. ‧ Manage third party design house or backend support ‧ Support IC design infrastructure like IT, tools, software, design server etc. ‧ Study and keep up knowledge of industrial spec, e.g. USB, Power Delivery, Audio, I2S, I2C etc. Technical/Customer Support ‧ Provide technical support to key customers and field engineers. ‧ Customer design-in support. ‧ Prepare training material and conduct training, if needed. Requirements: ‧ Degree/Master in Electrical/Electronic Engineering ‧ 10-15 years experience in the area of digital IC design ‧ 5-10 years experience in managing a design Centre ‧ Working experience from design to silicon are essential ‧ Knowledge and working experience with wired and wireless connectivity technology are desirable.

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0~5人應徵

4/29 IC設計自動化應用工程師 (EDA Application Engineer)

  • 台北市信義區
  • 經歷不拘
  • 大學

The EDA Application Engineer (EDA AE) is expected to support the sale and adoption of EDA products, assisting customers in achieving success with our Verification and Implementation related products, including System Level Design, Simulation, Synthesis, Test, Design Reuse, Place & Route, and more. Responsibilities include providing pre-sales activities and post-sales technical support such as technical presentations, technical support, product application, product deployment, expert training, and competitive benchmark. You should be able to serve as the product expert and drive the success of EDA design flow and tools. EDA應用工程師(EDA Application Engineer)的職責是支援EDA產品的銷售和採用,協助客戶在我們的驗證和實現相關產品上取得成功,包括系統層級設計、模擬、綜合、測試、設計重用、佈局佈線等等。職責包括提供前期銷售支援和售後技術支援,像是技術簡報、技術支援、產品應用、產品導入、專業培訓以及競爭性評估。您必須成為產品專家,引領EDA設計流程和工具的成功。 In addition, you will have the opportunity to work with and gain exposure to various designs while providing support to different customers. Through customer interactions, you can enhance not only your technical knowledge but also your soft skills, paving the way for a more diverse and successful career growth. 除此之外,您將有機會透過支援不同的客戶,接觸各種不同的設計。在與客戶溝通的過程中,您可以加強不僅是技術知識,還包括軟實力知識,為更多元的未來職涯發展打下基礎。 Key Qualifications  MSEE/BSEE or equivalent required, with 2+ years of experience  Experience in using ASIC/SoC front-end and/or back-end EDA tools with design knowledge is preferred  Strong customer sensitivity and ability to handle multiple issues while setting priorities  Demonstrates a helpful and caring attitude towards customers, with a desire to help them leverage new technologies  Self-motivated, capable of working independently, and possesses excellent communication skills, including a good command of English 主要資格:  具備碩士學位(MSEE/BSEE)或相當程度,並擁有2年以上的相關經驗  具有使用IC/ASIC/SoC前端和/或後端EDA工具的經驗,具備設計知識更佳  具有對客戶的敏銳觀察力,能夠處理多個問題並優先排序  展現樂於幫助和關懷客戶的態度,並渴望協助他們採用新技術  自我激勵,能夠獨立工作,具有出色的溝通能力,包括良好的英語掌握能力

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6~10人應徵

4/29 Senior Analog Design Engineer (High Speed/SerDes) [Taipei]

  • 台北市中山區
  • 6年以上
  • 碩士

【工作職責 (Responsibilities)】: ★ Build & innovate on high-speed analog/mixed-signal circuits such as PCIe/DDR/HDMI... transmitter and receiver in deep sub-micron CMOS technology for integration in SoC products. ★ Work with digital team on specification definition ★ Create behavior model for analog/digital evaluation ★ Compliance test for SerDes IP 【符合條件 (Qualifications)】: ★ Familiar with high speed SerDes specification ★ Familiar with IC/SoC design flow ★ Familiar with analog simulation flow ★ Experience SerDes analog blocks design ★ Must be good team player 【優秀條件 (Preferred Qualifications)】: ★ Familiar with controller integration ★ Familiar with other baseband analog IP design, such as ADC/DAC/PLL/LDO, etc. ★ Familiar with layout flow

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0~5人應徵
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