RF韌體設計資深工程師@新竹_04160005
- 新竹市
- 經歷不拘
- 大學
1. Xilinx FPGA 相關專案開發 2. 射頻晶片數位控制開發 3. FPGA與SPI及I2C相關應用 【Preference】： 1. 熟悉Xilinx開發平台 2. 毫米波天線模組數位控制開發 3. 熟悉周邊介面(I2C, SPI,GPIO,UART)與各式高速介面(Ethernet, Memory control etc…) 4. 協同跨部門工程單位，軟硬體整合優化 5. 通訊相關背景佳
研發類 - 系統軟、韌體工程師/專案經理(MP600)
- 新竹市
- 經歷不拘
- 大學
[Skill & Knowledge] 1. C, C++, Linux programming. 2. Embedded system firmware/software development. 3. Extensive knowledge of Linux OS internals, kernel programming, file system, filter drivers, storage stack, and storage technologies 4. Familiar with storage protocols such as eMMC, NVMe, and SATA, is plus 5. Familiar Linux, Android platforms, applications and OpenBMC is plus [Personality] self-motivation and love to challenging problems.
5/20 Senior Design Verification Engineer (Unit Level Test)
- 美商賽發馥股份有限公司臺灣分公司
- 電腦軟體服務業
- 新竹市
- 3年以上
- 大學
The Role: As a Design Verification Engineer, you will work with CPU designers, compiler team, performance team, and system verification team to generate the test cases automatically to fit those teams verification requirements in different perspectives. Your responsibilities will target establishing a highly scalable and reusable constrained random test bench that produces coverage driven tests. Responsibilities: - Review and influence product definition and specifications from a verification perspective and collaborate closely with the design team on feature specifications, test plans, and failure analysis. - Develop checkers and assertions to verify the memory subsystem designs with interconnect. - Develop tools, test benches, and test suites (UVM, C++/C, or otherwise as needed) to execute test plans. - Develop and maintain an in-house Verification IP (VIP) tailored for memory subsystem and interconnect testing - Write functional coverage, analyze both code and functional coverage, and close coverage holes.
待遇面議
員工500人
5/20 Design Verification Engineer (Unit Level Test)
- 美商賽發馥股份有限公司臺灣分公司
- 電腦軟體服務業
- 新竹市
- 3年以上
- 大學
The Role: As a Design Verification Engineer, you will work with CPU designers, compiler team, performance team, and system verification team to generate the test cases automatically to fit those teams verification requirements in different perspectives. Your responsibilities will target establishing a highly scalable and reusable constrained random test bench that produces coverage driven tests. Responsibilities: - Review and influence product definition and specifications from a verification perspective and collaborate closely with the design team on feature specifications, test plans, and failure analysis. - Develop checkers and assertions to verify the memory subsystem designs with interconnect. - Develop tools, test benches, and test suites (UVM, C++/C, or otherwise as needed) to execute test plans. - Develop and maintain an in-house Verification IP (VIP) tailored for memory subsystem and interconnect testing - Write functional coverage, analyze both code and functional coverage, and close coverage holes.
待遇面議
員工500人
5/20 軟韌體工程師
- 喆富創新科技股份有限公司
- 電腦軟體服務業
- 新竹縣竹北市
- 經歷不拘
- 大學
1. 負責軟體之分析、設計以及程式撰寫。 2. 規劃執行軟體架構及模組之設計，並控管軟體設計進度。 3. 進行軟體之測試與修改。 4. 規劃、執行與維護量產的產品。 5. 協助研發軟體新技術與新工具。
待遇面議
員工50人
5/20 Compiler Software Engineer to Sr Staff Engineer
- 美商賽發馥股份有限公司臺灣分公司
- 電腦軟體服務業
- 新竹市
- 經歷不拘
- 大學
RISC-V is a groundbreaking CPU instruction set architecture. Along with being an open-source instruction set, RISC-V is informed by decades of industry experience with various RISC processor designs, while being unencumbered with the necessity of backward compatibility. It is a unique opportunity to base a processor design on sound engineering principles, and the successful applicant will have comprehensive daily hands-on exposure to this architecture. While several companies are pursuing RISC-V design, only SiFive is founded and actively run by the inventors of RISC-V. This is not an academic exercise; we have real customers and real silicon. As new RISC-V ISA extensions are prototyped, implemented, and standardized, SiFive will remain at the forefront of RISC-V innovation by shipping the highest performance, the lowest power RISC-V processors in the world. In order to achieve this goal, we need specialists in advanced compiler technologies who are passionate about extract the most performance possible from applications on advanced micro-architectures. Responsibilities - Develop compiler and related toolchain for RISC-V processors - Aid the RISC-V LLVM porting effort, and ensure that LLVM performs well on SiFive's platforms - Define and implement advanced ISA extensions in LLVM and/or GCC - Contribute to the RISC-V standardization process for advanced ISA extensions - Participate in design discussions, planning, code review, documentation, open source processes, and other standard software practice. - Follow the agile way of software development; effectively manage your individual project priorities, deadlines and deliverables.
待遇面議
員工500人
5/20 韌體開發工程師
- 威達高科股份有限公司
- IC設計相關業
- 新竹市
- 經歷不拘
- 碩士
1. 電容式觸控演算法開發 2. 系統架構定義 3. 數位訊號處理 4. 嵌入式系統開發 5. 數位通訊 6. 基本示波器邏輯分析儀操作 7. 具MCU開發偵錯經驗者佳 擅長工具: C language
待遇面議
5/20 電競顯示器韌體工程師【資訊產品事業群】(桃園)
- 佳世達科技股份有限公司
- 電腦及其週邊設備製造業
- 桃園市龜山區
- 經歷不拘
- 大學
1. 電競顯示器韌體程式開發(8051, MCU, Scaler, Nvidia G-Sync) 2. 與客戶溝通並討論擬定產品規格, 和供應商溝通協調, 解決工廠量產問題 3. 產品問題分析和解決問題 4. 執行、協助或配合韌體新技術之研發、導入並維護量產產品。 上班地點： 韌體工程師(桃園市龜山區山鶯路157號))
5/20 軟韌體開發工程師(AP0360)
- 凌陽科技股份有限公司
- IC設計相關業
- 新竹縣寶山鄉
- 經歷不拘
- 碩士
1. Multimedia Decoder/Display/TCON 軟軔體開發 2. 車用多媒體軟硬體系統整合與維護 3. 車用IC FPGA/ASIC 驗證
5/20 軟韌體開發工程師(兼職)
- 啟發電子股份有限公司
- 多媒體相關業
- 新竹縣竹北市
- 3年以上
- 大學
依據ONVIF網路視訊監控傳輸協定，以C 語言完成網絡IP安防產品程試開發。 1. 依協議完成攝影機遠端控制平台 2. 依協議完成影像顯示平台 3. 依協議完成影像儲存
5/20 Performance Benchmarking and Infrastructure Engineer
- 美商賽發馥股份有限公司臺灣分公司
- 電腦軟體服務業
- 新竹市
- 1年以上
- 大學
Responsibilities: - SiFive board benchmarking - Competitor board enabling and benchmarking - Root cause the performance difference caused by either SW and/or HW - Customer benchmarking and support cooperation across teams - Performance and benchmarking infrastructure building - Regression system development and maintenance for performance monitoring of FPGA of all cores - Workflow development - Competitor microarchitecture analysis
5/20 FPGA開發工程師
- Macroblock_聚積科技股份有限公司
- IC設計相關業
- 新竹市
- 2年以上
- 碩士
工作內容：主要是Project Based的工作 1. 在IC設計之後端，進行IC驗證之控制器FPGA開發，讓FPGA可達到IC驗證之功能與輸出。 2. 在IC設計時，協助IC設計工程師，驗證數位功能與建立FPGA驗證平台 電機電子背景，基於FPGA 開發平台撰寫韌體，須熟悉:(非所有技能皆須有，越多相關者佳) 1. Verilog/VHDL code 2. C/C++ 3. 協助硬體設計人員設計系統電路板 4. 具影像處理經驗佳 5. 具介面技術處理經驗佳 - I2C/UART/SPI - 1000BaseT Ethernet - eDP/DP/HDMI/LVDS
5/20 軟韌體工程師(AP0320)
- 凌陽科技股份有限公司
- IC設計相關業
- 新竹縣寶山鄉
- 經歷不拘
- 碩士
負責車用影音娛樂系統產品技術支援: 1. 車用多媒體主機/儀表系統整合、開發與維護 (Linux base) 2. FPGA/ASIC IP Verification 3. 系統/客戶問題處理
5/20 軟體自動化開發工程師(BU1600)
- 智邦科技股份有限公司
- 電腦及其週邊設備製造業
- 新竹市
- 2年以上
- 專科
Job description: • Develop automated programs for specific tasks to make it effectively and efficiently. • Can deploy automated programs to the web interface, making it easy for users to use. • The output results can be presented in a visual way, and the project data can be quantified for real-time review. • Build and manage servers to ensure normal daily operations. • Continuously optimize the data analysis process: data collection, parsing, modeling, cleaning, analysis, report automation and improve user utilization. Qualifications: • Familiar with Python-based web construction and office related packages (e.g. Django, Pandas, NumPy). • Be familiar with the meaning and practical experience of DevOps (development, operation and QA). • Able to efficiently understand the problem requirements from engineers and project managers, and convert the problem requirements into necessary flow charts to facilitate program development. • Develop machine learning and deploy training model for error detection and visualization in engineering (e.g. Pytorch, TensorFlow) • Be able to understand the block diagrams of circuit diagrams (e.g. OrCAD) and the meanings of net names (bonus points) About the job: As a software automation and development engineer, you will be collaborating with hardware and diagnostics engineers. Your work has the potential to facilitate engineering tasks via self-developed python tools. As well, to use your imagination to develop automation tools/applications to make some meaningful results for hardware/diagnostic engineers is also terrific. To achieve the goal, how to leverage the resources of Python community to deliver a transparent result with simplicity and regularity is the main idea. Depending on your experience/expertise, you may leverage Python to choose what deliverables you want to make, the best way is to make it available around engineers (e.g. spreadsheets, dashboard, website ).
5/20 Firmware Engineer (system)
- 雲創通訊股份有限公司
- 其他電信及通訊相關業
- 新竹縣竹北市
- 3年以上
- 大學
1.Develop and maintain Protocol of IoT network on Embedded System Environment 2.Improve and maintain an IoT network protocol for current application domain 3.Enhance and implement an IoT network protocol for new application domain
待遇面議
5/20 Ethernet Switch軟韌體測試工程師
- 瑞昱半導體股份有限公司
- 半導體製造業
- 新竹市
- 經歷不拘
- 大學
工作項目： 1. 網路通訊協定之研究。 2. 測試案例撰寫(Python語言)。 3. 測試環境建置規劃、Linux/Windows應用伺服器架設。 4. 自動化測試案例執行。 5. 問題追蹤處理(Bug tracking)。 6. CI/CD流程建立。 7. 測試報告書撰寫。 8. 測試專案之規畫安排。 9. 其他主管交辦事項。 應徵條件： 1. 熟悉 Ethernet switch第二層、第三層通訊協定。 2. 熟悉 Python或願意學習者。 3. 熟悉作業系統：LINUX、Windows.
5/20 GS_嵌入式系統軟韌體研發工程師
- Zyxel Networks_兆勤科技股份有限公司(合勤集團)
- 通訊機械器材相關業
- 新竹市
- 經歷不拘
- 大學
1.Development and maintenance of current and next-generation Network Security product. 2.Implement software feature of Cloud Network Security products. 3.Software development process and coding/debugging techniques. 4.Hands on in bug fixing existing products. 5.Work closely with different teams, such as PM, QA and Technical Support.
待遇面議
員工400人
5/20 研發工讀生
- 明和電子企業股份有限公司
- 消費性電子產品製造業
- 桃園市蘆竹區
- 經歷不拘
- 高中
一、條件 1. 高中職以上電子電機相關科系畢業 2. 無經驗可 二、工作內容 1. 協助產品測試 2. 協助安規測試 3. 協助電路板製作 4. 協助處理文件、文書作業 三、說明 以協助工程師進行測試為主，了解產品、熟習各產品功能後， 再依能力進行設計培養， 後續依專業能力轉任助理工程師…等其它職務。
5/20 IMG-影像韌體工程師
- 晶鑠科技有限公司
- 光學器材製造業
- 新竹市
- 1年以上
- 大學
1. 彩色影像輸入處理 2. 掃描校正調整 3. CIS, AFE, motor, paper feeding handling
待遇面議
5/20 GS_系統整合軟體研發工程師
- Zyxel Networks_兆勤科技股份有限公司(合勤集團)
- 通訊機械器材相關業
- 新竹市
- 經歷不拘
- 大學
We are looking for a capable Software Engineer who is responsible to design and implement high speed networking functions. This position provides hands-on technical, architecture, management, and will also make an impact, bring in fresh ideas from different areas to help expand our team of high-energy developers. We offer excellent training and development opportunities, providing you with all the supports you need to be successful. • Linux BSP & firmware development and release • OpenWrt system and software architecture tuning, especially in LTE/WiFi gateway • Able to articulate, document and communicate ideas across team • Work closely with product management team developing requirements
待遇面議
員工400人
5/20 嵌入式軟體資深工程師
- 馬來西亞商芯易科技股份有限公司
- IC設計相關業
- 新竹縣竹北市
- 3年以上
- 碩士
尋找具有嵌入式系統開發經驗的人材，從事嵌入式系統FW/SW領域所包含的FW/SW設計開發、芯片驗證、產品化…等相關工作。 具備以下經驗與技能： -- 嵌入式系統FW/SW設計開發 (ARM / RISC-V平台) -- 晶片驗證 (Chip Validation, CV), 使用過HAPS/Zebu/Z1等平台 並具備以下其中一項經驗與技能： -- SPI / I2C / GPIO / UART 驗證、驅動開發 -- CPU驗證 (ARM / RISC-V), DDR驗證 -- PCIe驗證、驅動開發 -- bootloader開發與Bring-up -- RTOS / Linux 系統移植開發 崗位要求 1. CSIE, EE等相關專業，具碩士3年以上相關工作經驗; 2. 熟悉C語言。對assembly熟悉者佳; 3. 具有ARM / RICS-V平台上，RTOS / Linux系統中FW / SW開發經驗; 4. 具有CV (Chip Validation)經驗，使用過HAPS/Zebu/Z1等平台; 5. 具有Trace32, 示波器等調試工具設備的使用經驗與能力
待遇面議
5/20 (新竹)嵌入式演算法開發工程師
- 力領科技股份有限公司
- IC設計相關業
- 新竹縣竹北市
- 經歷不拘
- 碩士
1. 觸控演算法開發 2. 觸控演算法優化流程建置與自動化 2. 觸控驅動程式開發 3. 觸控調適工具開發
待遇面議