1.Addressable RGB LED 應用之控制系統韌體設計 2.RGB LED顯示屏之控制系統FPGA HDL設計 3.RGB LED顯示屏之控制系統嵌入式系統開發(driver porting, service program and Web UI) 4.測試治具應用軟韌體開發
1. Mini LED BLU local dimming分區灰階控制之韌體設計 2. Addressable RGB LED應用之定址及灰階控制之韌體設計 3. 小間距RGB 顯屏控制、車燈控制之韌體設計
1. IR/EM power model flow 2. IP characterization flow 3. pre-sim/post-sim flow 4. Aging flow 5. Bit-cell evaluation flow 6. CAD and QA flow 7. CAE and QA flow 8. Reliability check flow 9. Fast Monte-Carlo 10. Design margin check 11. Memory compiler 12. FE flow integrate 13. BE flow integrate
1. Calibre PERC/LVS/DRC command file維護及in-house command file撰寫 2. 驗證自動化流程開發(Shell/TCL/Ptyhon/Perl) 3. Physical Design/Layout 自動化程式及QC程式開發 (Shell、TCL、Python、Html/CSS、Java) 4.具Innovus/ICC2使用經驗，熟Cadence DBA語法尤佳 5.具 12/7/5nm Physical design experiences is a plus.
本職務之工作主要是協助實體設計部門，做whole chip的layout verification，其中包括DRC/LVS/PERC等驗證工作，並協助部門做自動化程式的撰寫及流程的開發，熟悉tcl/Python者尤佳。
[Standard Cell 工程師] 本職缺工作主要為差別化標準元件庫設計與開發, 並維護各製程標準資料庫, 建立characterization與驗證流程建置， 熟悉characterization流程相關tool或具有程式處理.tcl/perl/python/script尤佳. [工作項目] 1. Standard cell library model characterization / verification flow development. 2. Circuit design in general standard cell library and customized standard cells development. 3. Process technology exploration. 4. Digital design and sign-off flow development. 5. Low-V circuit and flow analysis and development.
1.參與UVM(Universal Verification Methodology)驗證環境建立及驗證程式開發 2.FCOV 驗證規劃 3.參與專案之SoC Level, IP Level ,Sub-system Level驗證計畫及驗證環境開發 4.產品應用 : PCIe/USB/UFS/SATA/Serial Attached SCSI (SAS)
1. 數位電路架構開發及驗證 ( Verilog / System Verilog / UVM) 2. 熟悉 CPU 硬體架構 / CPU 效能分析 3. FTL ( Flash Transfer Layer) algorithm IP 設計 4. 熟悉 AXI / AHB protocol，bus protocol IP 設計
1. 數位電路設計 (Verilog) 2. 數位電路驗證 (SystemVerilog , UVM , Assertion) 3. 了解MIPS / CPU / Pipeline 架構 4. 熟悉 AXI / AHB protocol 5. 優化電路品質 (Power,Performance,Area) 6. 操作EDA Tool (synthesis , cdc , power , ...)
1.學習基本數位電路與RTL Coding觀念 2.Design verification by RTL-sim, 與code coverage 改善 3.自動化程式建置 4.數位電路耗電分析
1. Requirement Analysis 2. Algorithm Development 3. System Architecture Design 4. System Modeling 5. Technical innovation research
1.Frontend design flow and quality check development. 2,Power domain plan and UPF/IEEE1801 power internt edit. 3.Advanced design methodology study and evaluation. 4.Interact with RTL & APR and provide them with timing/power/congestion/area proposal. 5.Run SYN/STA/Power/LEC/RDC verify and feedback.
1.學習數位IC設計流程 2.設計流程自動化程式建置 3.數位電路PPA分析 4.前瞻數位設計流程開發和評估
1. Digital design/verification 2. Familiar with NVMe/DDR is a plus.
1. Survey/ Design/ Implement FFE, DFE, LMS & MMSE for PCIE. 2. NCVerilog程式設計、模擬 3. 協助IP應用/授權之除錯與驗證
1.Familiar with block-level/high-speed IP physical imeplementation by Innovus/ICC2 2.Familiar with Laker, Virtuso, Calibre for layout verification 3.Familiar with STA for timing closure. 4.Programming skill for flow automation is plus
1. IC design flow (timing, area, power, verify) 2. DFT Circuits Insertion and quality check 3. ATPG diagnosis and PFA flow