Description of Talent Job Requirement職務說明
1. 5+ years experiences in ASIC/SOC mixed-signal circuitry design is a plus
2. Experienced on any multiple design of following analog IPs: IO, band-gap, DLL,
PLL, POR, Comparator/Amplifier,
ADC,DAC analog circuit design, modification, testing/,validation.
3. Familiar with IO circuit design, Latch up/ESD protection mechanism , signal
integrity quality control ,power , and IR drop
4. Familiar with Analog, memory IP, special circuitry library cell behavioral model
5. Solid discipline to perform flow of Analog design, layout plan and layout review,
post-sim, modification for target and margin
6. Familiar with analog design flow and analog IP integration on SoC, power plan,
performance ,cross talk is a plus
7. Experience with SoC failure mode on EMMI/ORBICH methodology and debug
strategy
8. Familiar analogy IP behavior model and timing lib creation or modification for SoC
integration is a plus
9. Good team work and new technology learner spitits
10. English communication capability is a must
11. Able to write design document , test report and failure analysis report structurally
in English and Chinese