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5/03 Jounior Physical Design Engineer (Malaysia)

  • 馬來西亞
  • 經歷不拘
  • 大學

1. Perform gate level netlist to GDS design independently including and not limit to floor planning, place&route, clock tree synthesis, timing sign off and physical verification. 2. For DFT engineers, need to able to implement scan chain, atpg, mbist, jtag, IP test logic into netlist. 3. Perform design IP implementation, IR drop analysis, DFT, STA and foundry merge. 4. Work with manager to achieve assigned tape out target.

待遇面議 員工500人
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0~5人應徵

5/03 Sr. Physical Design Engineer (Malaysia)

  • 馬來西亞
  • 3年以上
  • 大學

1. Perform gate level netlist to GDS design independently including and not limit to floor planning, place&route, clock tree synthesis, timing sign off and physical verification. 2. For DFT engineers, need to able to implement scan chain, atpg, mbist, jtag, IP test logic into netlist. 3. Perform design IP implementation, IR drop analysis, DFT, STA and foundry merge. 4. Work with manager to achieve assigned tape out target.

待遇面議 員工500人
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0~5人應徵

3/11 【Penang Branch】Digital IC Design Engineer

  • 馬來西亞
  • 5年以上
  • 大學

• Design digital circuits for leading edge imaging sensor ICs • Develop Verilog/RTL architecture and write Verilog codes. Perform gate level and top level simulations. • Generate test benches for verification and set up regression-test suite. • Perform functional verification with FPGA (pre-silicon) and verify post silicon prototypes thoroughly. • Interface with various groups during the design cycle including system, analog and physical design teams. • Conduct thorough design reviews

待遇面議 上市上櫃 員工500人
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0~5人應徵

呃拍謝，搜尋結果好像很少

可以嘗試調整條件、或看看你專屬的推薦工作

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5/03 SoC Physical Design Engineer (內湖)

  • 台北市內湖區
  • 1年以上
  • 大學

1. Perform gate level netlist to GDS design independently including and not limit to floor planning, place&route, clock tree synthesis, timing sign off and physical verification. 2. For DFT engineers, need to able to implement scan chain, atpg, mbist, jtag, IP test logic into netlist. 3. Perform design IP implementation, IR drop analysis, DFT, STA and foundry merge. 4. Work with manager to achieve assigned tape out target.

待遇面議 員工500人 距捷運劍南路站約500公尺
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5/03 Physical Design APR Engineer

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  • 3年以上
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1. Perform Netlist-to-GDS design flow, including floorplan, placement, timing optimization, clock tree synthesis and routing. 2. Perform physical verification, including DRC, LVS, IR drop analysis. 3. Familiar with IC physical implementation tools 4. Support STA timing analysis and fixing 5. TCL , Perl or Python script language skill is preferred.

待遇面議 員工300人
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4/29 技術支援類: Physical Design EMIR Product Applications Engineer

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Responsibilities: In this role, you will support areas of APR power integrity solution including voltage drop and electromigration, and rail optimization methodology. You will work on successful deployment of advanced Synopsys EDA products and solutions. This will involve working closely with internal engineers to develop methodologies to solve customer problems and to improve Synopsys tools and flows. Work closely with our customers assisting them in applying Synopsys power/thermal integrity products to complex designs. This work will contribute on driving the latest capabilities of Synopsys tools and advanced semiconductor foundry IC design offerings. The candidate must also excel in non-technical skill areas including teamwork, customer communication, and etc. Work with end user, R&D and AE to specify, develop and test EDA tool flows. To drive new and improved flows, methodologies and tool capabilities, and share and align on best practices Assist in the gathering, refining, writing and tracking of flow requirements as from end user requirements, end user feedback, engineering judgment and new tool capabilities. Requirements: BS/MS in EE, Microelectronics, CS or relevant Familiar with digital implementation design methodology (place and route), power integrity solution (IR/EM), and thermal. Self-motivated with good communication and presentation skill. Good English communication is required. Has a desire to learn and explore new technologies or tools. Demonstrates a positive attitude and good soft skills in teamwork. UNIX navigation and TCL scripting (Python is a plus).

待遇面議 外商公司 員工1300人
11~30人應徵
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