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3/28 雷射光達電子開發工程師(新竹)

  • 新竹縣竹北市
  • 經歷不拘
  • 大學

1.雷射光達電子電路開發設計 2.雷射光達試作量產電子相關工作 3.雷射光達安規ESD/EMI可靠度驗證測試 4.PCB Layout 元件佈局和走線確認 5.電子BOM表整理. 6.與元件廠商接洽應對需求元件規格.

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0~5人應徵

3/28 半導體_應用工程師(ATE Application Engineer)

  • 新竹縣竹北市
  • 3年以上
  • 專科

1. 開發功率半導體元件與模組之自動化測試程式 2. 開發功率半導體元件與模組之測試電路 3. 不定期至客戶端提供技術支援 4. 擔任客戶端技術培訓課程講師 官方網站:https://www.acesolution.com.tw/tw/index/

待遇面議 員工120人
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0~5人應徵

3/28 生產技術工程師

  • 新竹縣湖口鄉
  • 2年以上
  • 專科

1. 負責電子電路的系統設計整合、軟硬體開發及產品測試與試驗工作。 2. 設計及規格選型設計優化,如: 提升現有設計、設計降低生產成本、提升產品可靠性。 3. 與試產單位人員溝通合作,協助自動化製造生產能力效率優化改善,並確認生產組裝過程與設計相符。 4. 撰寫設計報告及品質問題分析與改善之8D報告。 5. 替代零件承認、電路板開發、產品電路設計、產品功能測試、產品測試除錯、可靠性測試及環境試驗。 6. 樣品製作實驗、樣品承認、製作作業指導書(插件規範)、建立BOM表。 7. 協助客戶產品故障分析及解決方案擬定。 本職務負責電子電路的系統設計整合、軟硬體開發及產品測試與試驗工作,擁有良好的職涯發展前景,歡迎對電子產業充滿熱情的您加入我們的研發團隊。 如果您滿足上述資格要求,並且渴望加入一個充滿活力和創造力的團隊,請盡快提交您的申請。

待遇面議 員工10人
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3/28 類比IC設計工程師

  • 新竹縣竹北市
  • 5年以上
  • 碩士

Imagine being part of a team that is fundamentally changing the way people communicate, the way they collaborate, the way they watch TV and explore the universe through the internet. Utilizing our uniquely differentiated technology, we have created an Intelligent Transport Network with more speed, capacity and scalability than ever before. Imagine a world with unlimited bandwidth. The network of tomorrow will allow for content and creativity limited only by the imaginations of its users. If this is something that interests you, that excites you, come take a look at a team not bound by large company obstacles and bureaucracy, where an idea today can be set in motion tomorrow. Come take a look at Infinera! Engaging in the high-speed analog circuit design, you have the chance to create the technical differentiation for Infinera to hold the market leadership. We together will revolutionize the era of efficient high speed transmission by building the cutting-edge circuitry. Essential Functions and Key Responsibilities: • Design, implement, and simulate the functionality and performance of various high speed analog circuits, including the ADCs and DACs; • Create the layout floor plans to optimize the overall performance; Supervise the layout activities and give concise guidelines to layout engineers, need to be hands on in drawing layout if necessary; • Exploring the trade-offs of the different topologies and propose the best solution to achieve or exceed the requirements in terms of power/area/linearity/bandwidth, etc. • Develop the analog testing plans and work with the PE/TE teams to characterize the functionality and performance of the products to ensure the quality; • Need to support and comply with the team’s design methodologies and release flows. Mandatory Knowledge/Skills/Abilities: • Must be extremely familiar with essential CAD tools, such as Cadence Virtuoso, Spectre, Incisive, Calibre, EMX, and Totem EM/IR, etc. • Must have a proven tracking record of designing complex analog / mixed signal IPs or chips in deep submicron CMOS technologies. • Must have experiences in bringing high performance analog IPs including but not limited to high-speed ADC, high-speed DAC, and high-frequency low-jitter PLL to production. • Must have a decent understanding in CMOS analog / mixed signal design methodologies and circuit analysis; • Must have a good understanding of device physics and the impacts of layout effects; • Able to perform the behavioral modeling the blocks and circuits with Verilog-A or Verilog-AMS; • Collaborative with other local or remote team members in a fast-paced professional environment. Preferred Knowledge/Skill/Abilities: • Fluent in verbal and written communications; • Independently resolves issues and conquer design challenges; • Self-motivated and detail-oriented; • Has the knowledge of (optical) communication theories and Matlab coding. Education and Experience Requirements: • Principal Design Engineer: M.S. in E.E. with 12+ years’ experience, or Ph.D. in E.E. with 8+ years’ experience Infinera is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, religion, color, national origin, sex, age, status as a protected veteran, or status as a qualified individual with disability. EEO Employer/Vet/Disabled.

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3/28 硬體研發工程師 (Hardware Design Engineer) - 工作地點:新竹

  • 新竹市
  • 經歷不拘
  • 大學

1. Ethernet Switch hardware design, debug, evaluation, and verification 2. Responsible for PCB material selection (SI/PI considered), schematics design, PCB layout constraint & review, HW DVT test and 2nd source verification...etc. 3. Writing and maintaining the hardware specification of the projects, failure analysis report if needed 4. Study tools & instruments for design & validation

待遇面議 員工150人
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3/28 SI模擬電子設計主任工程師@新竹_02050016

  • 新竹市
  • 經歷不拘
  • 大學

1. High speed interface SI/PI analysis (112 Gbps) 2. Responsible for Signal Integrity and Power Delivery simulations 3. Signal integrity tools measurements and correlations with simulations and measurement 4. Stackup design including PCB material and copper foil selection 5. PCB qualification test using VNA 6. Debugging, probing other lab work with instruments for server and connector product 【Requirement】 1. Familiar with signal and power integrity issues of high speed serial interfaces 2. Experience with simulation tool (Ansys HFSS/SIwave, Keysight ADS, Cadence Sigrity/PowerDC) 3. Familiarity with lab equipment, such as: VNA, TDR, real-time scope, spectrum analyzer, etc 4. Good communication skills

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6~10人應徵

3/28 研發一部-研發工程師

  • 新竹縣竹北市
  • 經歷不拘
  • 碩士

1.無線通訊模組硬體電路設計開發及PCB設計確認 2.產品性能驗證 3.產品測試驗證報告與技術文件撰寫 4.協助客戶產品設計問題排除即工廠生產相關問題協助 5.上級主管交辦事項 6.工作地點:竹北

待遇面議 員工85人
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