類比IC設計工程師
- 台北市信義區
- 6年以上
- 碩士
1. 高速介面電路設計 2. 負責Serdes PHY Ex. MIPI/PCIE PHY的開發與維護工作 3. 類比IP設計(EQ, CDR, OP, OSC, Regulator, BandGap, ...)
待遇面議
4/23 硬體研發工程師
- 美達科技股份有限公司
- 精密儀器相關製造業
- 新北市中和區
- 經歷不拘
- 大學
1.熟悉電路設計軟體，例如.Orcad..等。 2.設計類比電路，熟悉Opamp應用、電晶體應，具實做經驗。 3.設計數位電路，如.FPGA Coding..等，具實做經驗。 4.實際電路除錯經驗。
4/23 【2024研發替代役/預聘｜校園徵才】RD Team_Analog Design Engineer_類比IC設計工程師 (台北/新竹)
- MPS_芯源系統有限公司
- IC設計相關業
- 新北市汐止區
- 經歷不拘
- 碩士
Job Summary: Designing analog and mixed-signal ICs for Power Management Products utilizing leading edge sub-micron BiCMOS /DMOS technologies. Products to be designed may include, switching regulators, display drivers, audio amplifiers and power management ICs for fast-growing portable and non-portable markets such as broadband modems, PDAs, notebooks, cell phones, telecom, fiber optics, digital camera, network equipment, and automotive. Essential Functions: • Works on product definition, circuit synthesis from the transistor/resistor level up to the system level, simulation, layout supervision • Participates in the entire product development cycle, from product definition through product release. Qualifications: • MSEE / PhD of electronic engineering, analog or digital IC design topics • For analog, familiar to power converter (buck/boost/buck-boost/LDO) analog design will be the plus • Self-motivated, could have strong team work/collaboration with overseas colleges.
4/23 【2024研發替代役/預聘｜校園徵才】RD Team_Analog Layout Engineer_類比IC佈局工程師 (台北)
- MPS_芯源系統有限公司
- IC設計相關業
- 新北市汐止區
- 經歷不拘
- 大學
Job Summary: Layout Engineer will work directly and indirectly with Design / CAD / Layout Manager in development of Mixed-Signal and Analog Integrated Circuits. Individual will perform job professionally and independently. The following are the requirements for this job function. Essential Functions: • Layout Schedule Estimation • Device Placement on block level according to matching requirements • Block implementations on Top Level • Signal matching / sensitive nets shielding technique • Pad / ESD rule and routing / connection • Database DRC & LVS verifications • Chip Tapeout in accordance with company's Tapeout Procedure • Positive Attitude Qualifications: • Layout experience in Analog and/or Mixed-Signal Circuit Design • Ability to do chip plan, estimate die size and project schedule • Ability to resolve DRC & LVS data verification and tape out chip independently • Familiarity with fundamentals of analog processes • Experience with Cadence and/or VIRTUOSO tools preferable
4/23 類比IC設計(資深)工程師 (台北)
- 博發電子股份有限公司
- IC設計相關業
- 台北市南港區
- 經歷不拘
- 碩士
1. 類比IC設計之相關電子電機科系研究所畢業。 2. 具類比IC產品設計經驗尤佳。 3. 具製程和功率元件知識更棒。 4. 任職後可能會接觸基礎類比電路方塊、DC/DC, ADC,and FiIter等類比IC電路分析、設計和驗證等相關工作。
4/23 RF IC designer/manager
- 上緯科技電子股份有限公司
- 其他電子零組件相關業
- 新北市中和區
- 3年以上
- 碩士
1. Design RF IC in WiFi and IOT applications including SW/LNA/SAW/MEMS filter/Filter...etc. 2. Design of circuit link budget, topology and novel scheme development. 3. Optimization with process, device and system. 4. Measurement and optimization, bring to product launch
待遇面議
距捷運中原站約230公尺
4/23 資深數位IC設計工程師
- 亞士晶科技股份有限公司
- 電腦軟體服務業
- 台北市內湖區
- 5年以上
- 碩士
(1) 研讀專案相關規格書，然後對於專案所需要的功能進行RTL code設計。 (2) 對於該功能RTL code進行模擬與各項確認驗證。 (3) 對於整體ASIC進行FPGA系統驗證。 (4) 產生邏輯元件檔案並且做相關之時序檢驗與確認。
待遇面議
員工72人
4/23 類比IC設計工程師/副理(高速介面)(台北)
- 揚智科技股份有限公司
- IC設計相關業
- 台北市內湖區
- 經歷不拘
- 碩士
高速介面 (SerDes) 類比電路設計 Circuit design of CTLE/CDR/DFE/PLL/TX
4/23 [New College Graduate新鮮人專區] DFT Engineer
- NVIDIA_新加坡商輝達開發有限公司台灣分公司
- 其他半導體相關業
- 台北市內湖區
- 經歷不拘
- 大學
Senior DFT Engineer Location: Taiwan, Taipei Taiwan, Hsinchu NVIDIA is seeking phenomenal engineers to improve our DFT methodology, so we can validate the world’s largest design efficiently. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of extraordinary people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. We are now looking for a Senior DFT Engineer in our Taiwan, Taipei/Hsinchu Office! What you’ll be doing: -Implement testing architecture of VLSI -Generating test patterns and chip bringup -Develop testing methodology for VLSI -Develop design flow for testing What we need to see: -Master degree of Electrical Engineering/Computer Engineering/Computer Science -Good understanding of Design for Testing including Scan/ATPG/BIST/JTAG -Familiar with Verilog -Experiences with RTL and Simulation. -Understanding of Timing is plus -Skills of C/C++/Perl/Tck is a plus Ways to stand out from the crowd: -English communication is required. NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most brilliant and talented people on the planet working for us. If you're creative and autonomous, we want to hear from you!
4/23 Communication algorithm design engineer
- 富宇翔科技股份有限公司
- 通訊機械器材相關業
- 台北市內湖區
- 經歷不拘
- 碩士
1、Develop communication algorithm for •3GPP 4G/5G •WiFi •Bluetooth •Others 2、Study related specification. 3、Study technical document for signal processing. 4、Develop in Matlab environment.
待遇面議
距捷運港墘站約390公尺
4/23 RD Team_Sr. Analog Design Engineer (AC/DC)_資深類比IC設計工程師 (台北/新竹)
- MPS_芯源系統有限公司
- IC設計相關業
- 新北市汐止區
- 3年以上
- 碩士
Job Summary: Designing analog and mixed-signal ICs for Power Management Products utilizing leading edge sub-micron BiCMOS /DMOS technologies. Products to be designed may include switching regulators, display drivers, audio amplifiers and power management ICs for fast-growing portable and non-portable markets such as broadband modems, PDAs, notebooks, cell phones, telecom, fiber optics, digital camera, and network equipment. Essential Functions: • Works on mixed-signal power management IC design, circuit synthesis from the transistor/resistor level up to the system level, simulation, layout supervision • Participates in the entire product development cycle, from product definition through product release • Assists ATE development with Design-For-Test methods • Oversees and mentors junior engineers Qualifications: • BSEE / MSEE with 3+ years of Semiconductor and/or Analog circuit design experience. • Experience with low Iq design techniques • Basic understanding on the working principle of common ACDC converters,such as PFC, LLC, Flyback, Buck. • Experience with design and characterization of high accuracy data converters, such as delta-sigma or successive approximation (SAR) ADC. • Experience with high voltage (600V and above) process and product design • Understand analog layout techniques • Understand general IC qualification requirements • Experience with Verilog is preferred. • Good verbal and written skills. Location: Taipei, Hsinchu
4/23 【半導體業】資深研發設計工程師
- 友順科技股份有限公司
- 半導體製造業
- 新北市三重區
- 5年以上
- 碩士
1. 參與制定類比電路晶片的設計規格； 2. 依類比晶片設計規格設計晶片系統模組及電路架構，以及系統模擬、驗證； 3. 依晶片模組設計電晶體級電路，設計、模擬、驗證各模組，書寫模擬報告； 4. 規劃Layout佈局，指導及協助Layout工程師完成Layout佈局， 5. 熟悉CP、FT，主導晶片的debug工作，提升良率； 6. 撰寫測試規格、協助測試工程師解決測試開發中的問題，提高測試效率； 7. 配合應用工程師、測試工程師使產品成功、快速進入量產； 8. 配合應用工程師解答客戶技術問題，配合解決客戶應用問題。 9. 等主管交辦事項 10. 可選擇在台北或新竹辦公室上班
4/23 RD Team_Sr. Analog Design Engineer (DC/DC)_資深類比IC設計工程師 (台北/新竹)
- MPS_芯源系統有限公司
- IC設計相關業
- 新北市汐止區
- 3年以上
- 碩士
Designing analog and mixed-signal ICs for Power Management Products utilizing leading edge sub-micron BiCMOS / DMOS technologies. As a senior level design engineer, your will be responsible for block level analog circuit design, simulation; schematic capture; layout verification and post-layout extraction and simulation; top-level integration and verification.
4/23 類比IC設計工程師
- 聯合聚晶股份有限公司
- 半導體製造業
- 台北市內湖區
- 1年以上
- 碩士
※實際任用職稱依個人相關經歷敘薪。 1.大中小屏各類平面顯示器驅動晶片類比ˋ電源相關電路設計. 2.參與各類新產品開發規格定義ˋ區塊規劃ˋ設計模擬和驗證. 3.與邏輯ˋ系統和佈局設計工程師溝通合作,共同研發最具競爭力的產品.
待遇面議
員工30人
4/23 RD Team_Sr. Analog Design Engineer (Computing)_資深類比IC設計工程師 (台北/新竹)
- MPS_芯源系統有限公司
- IC設計相關業
- 新北市汐止區
- 3年以上
- 碩士
• Developing analog and mixed-signal ICs for Power Management Products utilizing leading edge sub-micron BiCMOS /DMOS technologies. • Products to be designed may include, multiphase mix-signal controllers, switching regulators, eFuse and power management ICs for fast-growing client computing and cloud computing markets such as CPU and GPU core power, ASIC power for AI, 5G networking, gaming and telecommunication
4/23 類比電源IC設計
- 登豐微電子股份有限公司
- IC設計相關業
- 新北市汐止區
- 8年以上
- 碩士
類比電源IC設計、電路模擬、IC驗證、熟悉佈局規劃及良率提升。 熟悉下列產品的開發及設計: 1.Buck/Boost/Buck-Boost controller/converter 2.LDO/ Power Switch/ OPAMP/ 3.Switching Charger IC 4.High voltage Gate Driver for Motor 5.Low voltage Gate Driver
待遇面議
員工50人
4/23 [New College Graduate新鮮人專區] Mixed-Signal / Analog Circuit Designer – New College Graduate - Hsinghu/Taipei
- NVIDIA_新加坡商輝達開發有限公司台灣分公司
- 其他半導體相關業
- 台北市內湖區
- 經歷不拘
- 碩士
We are looking for a Mixed-Signal / Analog Circuit Designer – someone who is excited to join a growing group of diverse individuals responsible for handling challenging high-speed mixed-signal circuit designs. NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can pursue, and that matter to the world. This is our life’s work, to amplify human creativity and intelligence. What you'll be doing: • You will be part of an analog team developing high-speed chip interfaces and complex analog functions that enable our graphics processing units (GPU) and SoC products (Tegra) • Design state-of-the-art mixed-signal circuits in deep sub-micron CMOS technologies. • Work closely with physical/layout engineers to floorplan and implement physical design of these functions. • Support debug, characterization and support product through high-volume production. What we need to see: • MSEE or PhD in Electrical Engineering. • Proven understanding of analog circuit layout concepts in submicron CMOS technologies • You have interests in more than one of the following areas: digital links for display interfaces (such as HDMI, LVDS, DVI, MIPI PHY, Display Port), USB, low-jitter clock synthesis using PLL techniques, IO pads, high-speed serial links, and ADC. • Able to communicate in spoken and written English • Work effectively in a team, good communication skills, enthusiasm and positive energy. • Proficiency in scripting languages like perl, python, skill etc. • Experience with design and verification tools (Cadence's IC design environment, analog circuit simulation tools like HSpice, Finesim, XA) • You are an expert with Cadence custom circuit design tools - particularly virtuoso • Experience running and debugging DRC and LVS with verification tools • If you have the dream to learn and explore new technologies and have good analytical skills, this is the ideal position for you. We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status. We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation.
待遇面議
員工18975人
4/23 類比電源IC設計資深工程師/副理
- 登豐微電子股份有限公司
- IC設計相關業
- 新北市汐止區
- 3年以上
- 碩士
類比電源IC設計、電路模擬、IC驗證、熟悉佈局規劃及良率提升。 熟悉下列產品的開發及設計： 1.Buck/Boost/Buck-Boost controller/converter 2.LDO/ Power Switch/ OPAMP/
待遇面議
員工50人
4/23 02.【2024新幹班】半導體/IC設計類
- 鴻海精密工業股份有限公司
- 消費性電子產品製造業
- 新北市土城區
- 經歷不拘
- 大學
1.負責MCU/DSP系統架構及數位電路設計、設計驗證方法論、流程開發和執行 2.以戰略資源角度，打造電動車驅動核心技術 3.工作地點為台北/新竹
待遇面議
上市上櫃
4/23 系統設計工程師 (類比電路, 硬體系統整合)
- 創控科技股份有限公司
- 精密儀器相關製造業
- 新北市中和區
- 3年以上
- 大學
職務描述： 我們正在尋找一位熱情且具有創造力的硬體系統設計人員，負責開發氣體感測器及化學分析儀器產品的硬體設計與整合。該職位負責開發與實現產品硬體設計，並與軟體開發人員合作，以確保設計能夠與軟體部分無縫配合。此外，該職位還需要協助解決產品開發過程中的技術問題，並與其他團隊成員密切合作，以確保項目的成功完成。能夠有流體力學/熱力學上的知識, 能夠對系統的內部相關熱/流的設計有完善的考量。 職務要求： 至少三年以上的感測器開發，硬體設計，或分析儀器系統架構及其整合設計經驗； 擁有電子工程、物理學、化學分析或相關領域的學士學位，碩士學位或以上優先考慮； 具有良好的類比電路訊號分析&處理、感測系統及電路設計能力； 能夠進行硬體驗證和故障排除； 具有優秀的溝通和協調能力，能夠與不同背景的團隊成員進行良好的溝通和協作； 有對技術創新和問題解決的熱情和動力。 優先考慮： 具有化學分析儀器相關領域的經驗，有質譜分析或設計背景尤佳； 熟練掌握FPGA、DSP等相關技術； 熟練掌握PCB設計; 熟悉嵌入式系統相關技術； 薪資：視經驗和能力而定。 如果您符合上述要求，可於履歷表附上相關作品樣本。我們期待著您能夠加入我們充滿活力和創造力的團隊。