類比IC設計工程師
- 台北市信義區
- 6年以上
- 碩士
1. 高速介面電路設計 2. 負責Serdes PHY Ex. MIPI/PCIE PHY的開發與維護工作 3. 類比IP設計(EQ, CDR, OP, OSC, Regulator, BandGap, ...)
待遇面議
4/24 Analog Design Engineer_類比IC設計工程師/Manager
- 浦飛爾科技有限公司
- 其他電子零組件相關業
- 台北市內湖區
- 經歷不拘
- 碩士
1. 根據產品要求研究設計類比電路，並負責模塊和整體電路的模擬和驗證。 2. 規劃佈局安排與提供佈局要求，並協同佈局工程師進行佈局設計，確保達到電路設計的要 求； 3. 協助測試和產品部門進行模塊或產品的測試、調試、分析和量產。 4. 維護及改善既有的類比IC設計。 5. 負責相關技術文件的閱讀與撰寫。 孰悉以下工具: - 具有良好的元件和類比電路設計理論基礎，如Opamp和Bandgap等。 - 熟悉常用的EDA開發工具。 - 具有Memory存儲((ReRAM, NOR/NAND flash, SRAM, DRAM) 、電源管理、ADC / DAC 等相關電路設計經驗優先考慮。
待遇面議
員工20人
4/24 類比ic設計工程師(台北)
- 香港商睿克科技有限公司台灣分公司
- 電腦系統整合服務業
- 台北市中正區
- 3年以上
- 大學
1. 設計、驗證和除錯類比電路，包括但不限於SERDES、ADC、DAC、OPAMP、Bandgap、PLL、I/O等。 2. 進行SOC整合，與其他部門協調工作，確保產品開發進度。 3. 對半導體製程、ESD防護和IO設計有興趣。 4. 維護和改進現有的類比IC設計。 5. 高速電路設計包含USB, HDMI, Displayport等。 本職位將負責設計高速的類比電路，這是當今技術發展的關鍵領域之一，未來發展前景非常看好。此外，本職位將與跨職能團隊合作，從事產品開發和量產等工作。 歡迎對類比IC設計有濃厚興趣並符合以上要求的應聘者申請本職位，期待您的加入！
待遇面議
遠端工作
4/23 類比IC設計工程師/副理(高速介面)(台北)
- 揚智科技股份有限公司
- IC設計相關業
- 台北市內湖區
- 經歷不拘
- 碩士
高速介面 (SerDes) 類比電路設計 Circuit design of CTLE/CDR/DFE/PLL/TX
4/23 類比IC設計(資深)工程師 (台北)
- 博發電子股份有限公司
- IC設計相關業
- 台北市南港區
- 經歷不拘
- 碩士
1. 類比IC設計之相關電子電機科系研究所畢業。 2. 具類比IC產品設計經驗尤佳。 3. 具製程和功率元件知識更棒。 4. 任職後可能會接觸基礎類比電路方塊、DC/DC, ADC,and FiIter等類比IC電路分析、設計和驗證等相關工作。
4/23 資深數位IC設計工程師
- 亞士晶科技股份有限公司
- 電腦軟體服務業
- 台北市內湖區
- 5年以上
- 碩士
(1) 研讀專案相關規格書，然後對於專案所需要的功能進行RTL code設計。 (2) 對於該功能RTL code進行模擬與各項確認驗證。 (3) 對於整體ASIC進行FPGA系統驗證。 (4) 產生邏輯元件檔案並且做相關之時序檢驗與確認。
待遇面議
員工72人
4/23 [New College Graduate新鮮人專區] DFT Engineer
- NVIDIA_新加坡商輝達開發有限公司台灣分公司
- 其他半導體相關業
- 台北市內湖區
- 經歷不拘
- 大學
Senior DFT Engineer Location: Taiwan, Taipei Taiwan, Hsinchu NVIDIA is seeking phenomenal engineers to improve our DFT methodology, so we can validate the world’s largest design efficiently. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of extraordinary people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. We are now looking for a Senior DFT Engineer in our Taiwan, Taipei/Hsinchu Office! What you’ll be doing: -Implement testing architecture of VLSI -Generating test patterns and chip bringup -Develop testing methodology for VLSI -Develop design flow for testing What we need to see: -Master degree of Electrical Engineering/Computer Engineering/Computer Science -Good understanding of Design for Testing including Scan/ATPG/BIST/JTAG -Familiar with Verilog -Experiences with RTL and Simulation. -Understanding of Timing is plus -Skills of C/C++/Perl/Tck is a plus Ways to stand out from the crowd: -English communication is required. NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most brilliant and talented people on the planet working for us. If you're creative and autonomous, we want to hear from you!
4/23 類比IC設計工程師
- 聯合聚晶股份有限公司
- 半導體製造業
- 台北市內湖區
- 1年以上
- 碩士
※實際任用職稱依個人相關經歷敘薪。 1.大中小屏各類平面顯示器驅動晶片類比ˋ電源相關電路設計. 2.參與各類新產品開發規格定義ˋ區塊規劃ˋ設計模擬和驗證. 3.與邏輯ˋ系統和佈局設計工程師溝通合作,共同研發最具競爭力的產品.
待遇面議
員工30人
4/23 [New College Graduate新鮮人專區] Mixed-Signal / Analog Circuit Designer – New College Graduate - Hsinghu/Taipei
- NVIDIA_新加坡商輝達開發有限公司台灣分公司
- 其他半導體相關業
- 台北市內湖區
- 經歷不拘
- 碩士
We are looking for a Mixed-Signal / Analog Circuit Designer – someone who is excited to join a growing group of diverse individuals responsible for handling challenging high-speed mixed-signal circuit designs. NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can pursue, and that matter to the world. This is our life’s work, to amplify human creativity and intelligence. What you'll be doing: • You will be part of an analog team developing high-speed chip interfaces and complex analog functions that enable our graphics processing units (GPU) and SoC products (Tegra) • Design state-of-the-art mixed-signal circuits in deep sub-micron CMOS technologies. • Work closely with physical/layout engineers to floorplan and implement physical design of these functions. • Support debug, characterization and support product through high-volume production. What we need to see: • MSEE or PhD in Electrical Engineering. • Proven understanding of analog circuit layout concepts in submicron CMOS technologies • You have interests in more than one of the following areas: digital links for display interfaces (such as HDMI, LVDS, DVI, MIPI PHY, Display Port), USB, low-jitter clock synthesis using PLL techniques, IO pads, high-speed serial links, and ADC. • Able to communicate in spoken and written English • Work effectively in a team, good communication skills, enthusiasm and positive energy. • Proficiency in scripting languages like perl, python, skill etc. • Experience with design and verification tools (Cadence's IC design environment, analog circuit simulation tools like HSpice, Finesim, XA) • You are an expert with Cadence custom circuit design tools - particularly virtuoso • Experience running and debugging DRC and LVS with verification tools • If you have the dream to learn and explore new technologies and have good analytical skills, this is the ideal position for you. We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status. We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation.
待遇面議
員工18975人
4/23 Communication algorithm design engineer
- 富宇翔科技股份有限公司
- 通訊機械器材相關業
- 台北市內湖區
- 經歷不拘
- 碩士
1、Develop communication algorithm for •3GPP 4G/5G •WiFi •Bluetooth •Others 2、Study related specification. 3、Study technical document for signal processing. 4、Develop in Matlab environment.
待遇面議
距捷運港墘站約390公尺
4/23 (台北)類比IC設計工程師
- 昇佳電子股份有限公司
- 其他電子零組件相關業
- 台北市內湖區
- 2年以上
- 碩士
1.類比IP設計(Bandgap,OPAMP,ADC,DAC,PLL,Charge Pumping等) 2.熟悉hspice,Co-Sim等simulation tools,具晶片整合經驗佳
4/22 IC設計工程師 (數位/類比)
- 英屬維京群島商杰恒國際有限公司台灣分公司
- 人力仲介代徵
- 台北市信義區
- 經歷不拘
- 碩士
協助台灣知名半導體公司徵才，有興趣者歡迎連繫: Blair Hu [email protected] +886 919140955
4/22 Manager/Teamleader IC Design - Taipei Office
- 新加坡商寶吉特有限公司台灣分公司
- 半導體製造業
- 台北市內湖區
- 10年以上
- 大學
Development: ‧ Assist management team in IC roadmap and product definition specification. ‧ Manage a team of IC designer with responsibility to bring design to production. ‧ Perform as project manager to lead project execution. ‧ Perform IC specification and RTL design. ‧ Perform design verification, building testbench and testcases. ‧ Perform design code review and maintain design quality. ‧ Perform top-level integration and support backend activities for tape-out. ‧ Perform system validation through FPGA prototyping. ‧ Support Silicon validation and IC production. ‧ Perform design documentation. ‧ Manage third party design house or backend support ‧ Support IC design infrastructure like IT, tools, software, design server etc. ‧ Study and keep up knowledge of industrial spec, e.g. USB, Power Delivery, Audio, I2S, I2C etc. Technical/Customer Support ‧ Provide technical support to key customers and field engineers. ‧ Customer design-in support. ‧ Prepare training material and conduct training, if needed. Requirements: ‧ Degree/Master in Electrical/Electronic Engineering ‧ 10-15 years experience in the area of digital IC design ‧ 5-10 years experience in managing a design Centre ‧ Working experience from design to silicon are essential ‧ Knowledge and working experience with wired and wireless connectivity technology are desirable.
4/22 類比IC設計資深工程師
- 振生半導體股份有限公司
- 半導體製造業
- 台北市大安區
- 經歷不拘
- 碩士
振生半導體股份有限公司 (Jmem tek) 專注於半導體相關矽智財，提供設計服務與硬體資安專利，保護硬體資訊安全。如果您希望參與一個充滿潛力和創造力的環境，歡迎您加入我們的團隊。 工作內容： • 混合訊號處理 (ADC, DAC, PLL) • 設計與開發PMIC相關電路 (Charge pump, LDO...) • 開發High power domain 電路與 core voltage domain 電路整合 • 晶片整合並完成晶片驗證與T/O 我們期望您具備的條件： • 有power相關電路開發經驗者。 • 3年以上工作經驗為佳。 • 有專案經驗者佳。 • 有Security IP (Ex: PUF, TRNG) 開發經驗者佳。 相關報導： 數位時代：陽明交大出身的Jmem Tek的硬體資安技術有何特別？ https://meet.bnext.com.tw/articles/view/50065 DIGITIMES Asia報導：Chip startup JMEM TEK safeguards data security with hardware-software solution https://www.digitimes.com/news/a20221223VL202.html
4/22 MMIC/RFIC Design Engineer
- Kaiku_開酷科技股份有限公司
- 電子通訊／電腦週邊零售業
- 台北市南港區
- 3年以上
- 大學
Job Requirements: Master or PhD degree in EE is required as a minimum from a reputed college. Experienced in CMOS LNA, Mixer, PA. T/R Switch block design and trade-offs Experienced in CMOS VCO, DCO, ILO, Frequency divider/multiplier block design and trade-offs Experienced in CMOS Synthesizer/FracN PLL with wideband modulation techniques Experienced in passive component design using EM tools -- transmission line, transformer, inductor, coupler, etc. Familiar with basic CMOS analog circuit blocks such as PGA, OPAMP, LDO, ADC/DAC Familiar with basic CMOS digital logic design Familiar with digital/analog Sigma Delta design concepts Written and verbal communication/documentation skills. Ability to profile the values, requirements, issues, risks, and solutions for engineering works. Fast-learner, motivated to work in startup environment. KaiKuTek is the world's leading provider for 3D gesture sensor using mmWave Radar with embedded AI accelerator. We possess key technologies in areas such as Antenna-in-Package (AiP), ML algorithm, AI accelerator, as well as 60 GHz radar transceiver design. With recent merger by JMicron, founded in 2001 and located in Hsinchu Science Park, our product portfolio expands to high speed SerDes bridge controller SOC's mainly in storage application utilizing USB, PCIe, and SATA. This new sensing technology will change and redefine human-machine interface as we know today, and mmWave technology combined with high speed SerDes will open door to many new possibilities and application frontiers. KaiKuTek is looking for enthusiastic MMIC/RFIC developers willing to take upon new challenges of working closely with cross functional teams, including digital IC designers, antenna/packaging engineers, hardware engineers, software and firmware engineers, production and testing as well as marketing and FAE, to optimize the overall SoC performance in terms of power, area, functionality, testability as well as to create proof-of-concept for new customer engagement.
待遇面議
距捷運南港軟體園區站約440公尺
4/22 【研發替代役】Analog Design Engineer(台北)
- 英屬蓋曼群島商譜瑞科技股份有限公司台灣分公司
- IC設計相關業
- 台北市內湖區
- 經歷不拘
- 碩士
-Solid integrated circuit and solid state devices knowledge -Familiar with circuit design EDA tools -Knowledges in the following areas are a plus: PLL, high speed circuit design, I/O design, LVDS, ESD, ADC/DAC, switching regulator, low noise design
4/22 Analog Design Engineer-High Speed(台北)
- 英屬蓋曼群島商譜瑞科技股份有限公司台灣分公司
- IC設計相關業
- 台北市內湖區
- 1年以上
- 碩士
1. Analog circuit design and verification, such as OPAMP, Bandgap, ADC/DAC, PLL, and etc. 2. Power management circuit design and verification, such as LDOs, Charge Pumps, Switching Regulators, Gamma reference, and etc. 3. Whole chip integration with mixed-signal circuit. 4. HV I/O and ESD design.
4/22 類比IC設計工程師
- 巨量移動科技有限公司
- 電腦軟體服務業
- 台北市內湖區
- 經歷不拘
- 大學
1. 具有類比IC設計經驗或相關科系/所畢業 2. Familiar with High-Speed Transceiver Designs, CDR/PLL, ADC/DAC, Delta-Sigma Modultors, DC-DC Converters, or Linear Regulators. 3. or Familiar with digital signal processing(DSP)/adaptive filtering and logic implementation. 4. USB, DP, HDMI, PCIe or SATA experience is a plus. *************************************************************************** 如有興趣 若可以請準備個人履歷或相關作品說明 並將個人履歷資料上傳到以下網站 : https://ppt.cc/fPt3lx 檔案命名方式為 履歷檔案-名字-日期 比如 履歷檔案-張大明-2020815 檔案可以包成同一個壓縮檔) 若可以 內容盡量包含 : 1.大學碩士成績單 2.研究或專題論文 3. 其他可加分之書面資料 ***************************************************************************
4/22 Analog IC Design Senior Engineer
- Kaiku_開酷科技股份有限公司
- 電子通訊／電腦週邊零售業
- 台北市南港區
- 3年以上
- 大學
Job Description: (1) Familiarize with high speed serial link circuit design. (2) Serdes design including RX CTLE/DFE, clock/data recovery circuit, TX driver. (3) High frequency low jitter phase-locked loop design. (4) High speed IO design. (5) High speed ADC/DAC design. (6) Analog and RF circuit design. KaiKuTek is the world's leading provider for 3D gesture sensor using mmWave Radar with embedded AI accelerator. We possess key technologies in areas such as Antenna-in-Package (AiP), ML algorithm, AI accelerator, as well as 60 GHz radar transceiver design. With recent merger by JMicron, founded in 2001 and located in Hsinchu Science Park, our product portfolio expands to high speed SerDes bridge controller SOC's mainly in storage application utilizing USB, PCIe, and SATA. This new sensing technology will change and redefine human-machine interface as we know today, and mmWave technology combined with high speed SerDes will open door to many new possibilities and application frontiers. KaiKuTek is looking for enthusiastic Analog IC Design developers willing to take upon new challenges of working closely with cross functional teams, including digital IC designers, antenna/packaging engineers, hardware engineers, software and firmware engineers, production and testing as well as marketing and FAE, to optimize the overall SoC performance in terms of power, area, functionality, testability as well as to create proof-of-concept for new customer engagement.
待遇面議
距捷運南港展覽館站約420公尺