Driver IC 設計 Analog IP 設計 高速interface Analog IP設計 Whole Chip 整合
1. 16bit ADC/DAC design experience 2. PLL/DLL/RF/OCO/POR/LVDS design experience 3. LDO/DC-DC design experience 4.Guide layout engineer to make a compact & working layout
analog and digital circuit layout繪製
MCU相關類比電路設計：RCOSC , Xtal , Bandgap , LDO , OPAMP , DAC , ADC , POR , LVD 等.
*ADC/PLL/SRAM circuit desing *DCDC circuit design- Change Pump、LDO、BGR、PFM/PWM circuit design, etc. *ESD design
1.Whole system signal and power integrity modeling and simulation including IP (DDR and other interface IP such as MIPI, PCIE, etc.), package and PCB. 2.Package and PCB model extraction for SI/PI simulation. 3.Co-work with IP designers to simulate and solve IP and system level SI/PI issues.
在我們的實習過程中，您將有機會在專案中擔任以下角色： 1. 數位IC設計EDA工程師 (CAD Engineer) 2. 數位IC電路設計工程師 (Standard Cell Design Engineer) 3. 數位IC佈局工程師 (Standard Cell Layout Engineer) 4. 數位IC實體設計工程師(Physical design Engineer) ※ 應徵者請附上完整履歷及自傳。
MCU相關類比電路設計：RCOSC , Xtal , Bandgap , LDO , OPAMP , DAC , ADC , POR , LVD 等.
* 電子/電機相關科系畢業 * 具DDR PHY 相關設計經驗佳 * 對DRAM系統，JEDEC spec有相對的理解 * Familiar with Spice simulation
* Familiar with High-speed SerDes (高速介面) PHY design such as PCIE, USB3, SATA, MIPI, MPHY, HDMI, etc. * Circuit design experience in any of the following aresa: PLL, SCPLL, Transmitter, Receiver and CDR.
1. ESD保護元件設計 2. EOS/Surge保護元件設計 3. 積體電路系統ESD防護設計 4. 協助RD處理製程問題、與製程廠聯繫、以及Tapeout，MT Form等相關事宜
•Analog IP design of display source driver IPs like OP, RX, DAC, BG •Whole chip integration of display source driver IC •P2P(iSP, USI-T, CSPI, CMPI, CEDS) display source driver IC integration
研究所以上電子、電機相關所組畢，具類比積體電路基礎，對類比電路設計，如PLL、USB、ADC、DAC有經驗。
歡迎對加入成長中的團隊有興趣的工程師，除了高薪資收入以外，還可以參與了解到產品規劃的歷程，在清楚需求的壓力下，團隊一同努力達成目標，搶佔市場，獲得更好的收入和成就感。 如您具備以下經驗或興趣，歡迎與我們聯繫： 1. TDDI 或 Amoled產品工作經驗。 2. eDP或MIPI PHY Circuit Design: 1) PHY TX design 2) PHY RX design 3) Low power PLL/DLL design