4/22 【研替專區】2024年研發替代役-類比IC工程師
- 苗栗縣竹南鎮
- 經歷不拘
- 碩士
1. Analog/Mixed signal IC & architecture design for SerDes, Adaptive Equalizer (CTLE/FFE/DFE), CDR, low jitter PLL, PHY, Transmitter, Receiver 2.Project example: SATA, USB, PCIe, M-PHY, up to 20Gb/s high speed serial I/O
4/22 ESD Design Engineer
- 苗栗縣竹南鎮
- 3年以上
- 碩士
1. 產品ESD/EOS防護設計 2. 新製程ESD/Latch up技術開發/驗證 3. 產品 ESD 失效分析 4. 製程相關問題解決
4/22 Memory/SRAM R&D Engineer
- 苗栗縣竹南鎮
- 3年以上
- 碩士
1. Memory/SRAM circuit design 2. Memory/SRAM compiler development 3. Supervision and co-work with layout members 4. Memory/SRAM circuit simulation and design verification. 5. Memory/SRAM yield improvement & test IP development. 6. SRAM liberty characterization flow. 7. SRAM library maintaining.
4/22 PCIe 工程師0611
- 苗栗縣竹南鎮
- 經歷不拘
- 碩士
1. 分析PCIe Retimer 問題 2. 量測PCIe 電氣特性 3. 熟悉PCIe protocol 4. 熟RTL code & run simulation
4/22 晶片元件設計流程開發工程師
- 苗栗縣竹南鎮
- 1年以上
- 碩士
1.SRAM front-end/back-end model file verification 2.SRAM front-end/back-end model file auto generation 3.Script develop and maintain 3.Co-work with tool vendor
4/22 標準元件庫(Standard Cell)設計工程師
- 苗栗縣竹南鎮
- 3年以上
- 碩士
[Standard Cell 工程師] 本職缺工作主要為差別化標準元件庫設計與開發, 並維護各製程標準資料庫, 建立characterization與驗證流程建置， 熟悉characterization流程相關tool或具有程式處理.tcl/perl/python/script尤佳. [工作項目] 1. Standard cell library model characterization / verification flow development. 2. Circuit design in general standard cell library and customized standard cells development. 3. Process technology exploration. 4. Digital design and sign-off flow development. 5. Low-V circuit and flow analysis and development.
4/22 NVM電路設計工程師
- 苗栗縣竹南鎮
- 2年以上
- 碩士
1. NVM(eFuse, OTP, MTP) IP design and development. 2. Advanced node process detection circuit design and development. 3. Support SOC integration with memory IPs.
4/22 SRAM/Memory Characterization Engineer
- 苗栗縣竹南鎮
- 3年以上
- 碩士
1. SRAM liberty characterization flow. 2. SRAM library maintaining. 3. FE/BE model QA flow
4/22 混合訊號IP設計工程師
- 苗栗縣竹南鎮
- 5年以上
- 碩士
1.Develop process monitor architectures and circuit implement techniques. 2.Schematic entry, simulation of major blocks, layout planning, layout supervision 3.Interface with CAD team for full verification and model generation 4.Interface with project team and PE for process data analysis 5.Supervision of layout and circuit designers
4/22 類比IC設計工程師0501
- 苗栗縣竹南鎮
- 1年以上
- 碩士
1. High Speed IO/transceiver circuit designs on DDR4/5 PHY, flash PHY. 2. Power analog circuit designs on PMIC, DC2DC converter, LDO. 3. Analog circuit design on various functional analog IPs like ADC, PLL, DAC
4/22 類比混合訊號IC設計/高速介面IC設計工程師/Serdes IC design(竹南)
- 苗栗縣竹南鎮
- 經歷不拘
- 大學
* Analog/Mixed signal IC design & architecture for SerDes, Adaptive Equalizer (CTLE/FFE/DFE), CDR, PLL, PHY, Transmitter, Receiver, RF , wide-band, high frequency amplifier, LNA, TIA, PA * Project example: SATA, USB, PCIe, M-PHY, up to 32Gbps high speed serial & parallel I/O
4/22 電源管理IC (PMIC)設計工程師08A1
- 苗栗縣竹南鎮
- 1年以上
- 碩士
1. Responsible for architecture and design of power management IC (PMIC). Will perform hands-on circuit design, simulation, and verification of circuit blocks such as Buck converter, LDO, comparator, op-amps and other analog circuits. Also responsible for performing post-layout verification. 2. Behavioral modeling of PMIC analog and digital circuits. Complete mixed signal simulations for verification of chip level and system level performance. Also responsible for evaluating, measuring, and debugging silicon through production.
4/22 類比/混合訊號 - IC設計流程開發工程師
- 苗栗縣竹南鎮
- 經歷不拘
- 大學
1. 開發類比IC設計流程，包括電路模擬與結果驗證等。 2. 協助EDA Tool使用與環境設定等相關問題解決方案。 3. 設計資料如 SPICE Model / EM-IR Flow / Post-Sim netlist 等相關檔案的更新與維護。 4. Foundry PDK 的設定與維護。
4/22 車規IC設計工程師8300
- 苗栗縣竹南鎮
- 3年以上
- 碩士
1.IP設計及開發 2.車規IC相關設計及驗證 3.負責車規相關流程(ISO26262, ASPICE, APQP, IATF16949….) 4.負責跨部門溝通、規劃、產出和審核車規相關文件