IC Block fully Layout. (1) 熟悉 layout tools(Virtuoso) (2) 熟悉 verify tools(calibre) (3) 熟悉 DRC/LVS debug 定期契約期間：12個月。 期滿視狀況決定是否續約或轉正職。 相關工作經歷 2年以上 學歷要求 專科以上
1.從事FPGA RTL撰寫/設計 2.自有IP(Intellectual Property)設計/研發 3.特殊高端產品FPGA應用
1.開發multi-mode GSM/WCDMA/LTE L1 software 2.開發OFDM信號處理嵌入式系統 3.開發ASIP/DSP架構數位通訊系統
1.從事FPGA RTL撰寫/設計 2.自有IP(Intellectual Property)設計/研發 3.特殊高端產品FPGA應用
1. Logic NVM, SONOS 記憶體電路開發設計(Array, Decoding, Sense Amplifier等電 路) 2. 記憶體電路整合開發設計。 3.客戶溝通規格
1. Logic NVM, SONOS 記憶體電路開發設計(Array, Decoding, Sense Amplifier等電路) 2. 記憶體電路整合開發設計。
1.硬體線路設計開發,熟悉ORACD Allego 軟體 2.新機種評估、與客戶溝通相關設計問題 3.問題分析與解決 4.產品組裝流程制定 5.工廠試產技術支援
1. 高速介面設計經驗(USB, PCIe, MIPI, DDR, 等等) 2. SoC設計整合經驗與熟悉Tape-out流程 3. FPGA 設計驗證經驗 4. 熟悉AMBA架構、CPU架構 5. Low power經驗(UPF/CPF)
1. 熟悉Xilinx MPSoC嵌入式系統開發 2. 熟悉RTL coding and simulation 3. 熟悉Petalinux 作業系統開發 4. AI 算法在FPGA上的開發與實現
Roles & Responsibility: • Analysis of notebook display system - Engage N/N+1 display technology validations & scaling. - Establish validation plans & experiment environment for N+2 prototype or PoC. - Analyze & summarize engineering reports to identify the meaning of numbers. • Survey and build validation plans & experiment environment for 3rd party lab. • 1-2 times weekly meetings with US & India team. • Demonstration for introductions of system test setup/measurements with tools may be required. • As well as lab tools/systems and accessories shipping logistics. • Support external display port enabling. (optional)
※實際任用職稱依個人相關經歷敘薪。 1.各類平面顯示器驅動晶片數位電路設計. 2.參與新產品開發規格定義ˋ區塊規劃ˋ設計模擬ˋ整合和驗證. 3.與類比ˋ系統和佈局設計工程師溝通合作,共同研發最具競爭力的產品 4.開發CP 測試程式，從 CP 測試程式流程 實際驗證所設計數位電路之可測試性。
1. Audio filter design and verification 2. Audio IP maintain and verification, e.x. I2S, SPDIF 3. Audiosys integration, including tape out flow 4. EDA flow optimization
JMicron, founded in 2001 and located in Hsinchu Science Park, is a leading provider for high speed SerDes bridge controller SOC's mainly in storage application utilizing USB, PCIe, and SATA. With recent merger of KaiKuTek, our product portfolio now extends to 3D mmWave smart sensor for gesture recognition and AIoT markets. We now possess key technologies in areas such as Antenna-in-Package (AiP), ML algorithm, AI accelerator, as well as 60 GHz radar transceiver design. This new sensing technology will change and redefine human-machine interface as we know today, and mmWave technology combined with high speed SerDes will open door to many new possibilities and application frontiers. JMicron is looking for enthusiastic digital IC design engineers willing to take upon new challenges of working closely with cross functional teams, including analog/RFIC designers, hardware engineers, software and firmware engineers, production and testing as well as marketing and FAE, to optimize the overall SoC performance in terms of power, area, functionality, testability as well as to create proof-of-concept for new customer engagement.
1、Develop communication algorithm for •3GPP 4G/5G •WiFi •Bluetooth •Others 2、Study related specification. 3、Study technical document for signal processing. 4、Develop in Matlab environment.
a. Sensor IC/ Mixed Signal IC Design, Verification, Design/Verification related documents writing: - Familiar with Hspice, Matlab simulation tools. - Preferred to be familiar with ADC/DAC, Bandgap, Regulator, Filter, and other related IP design. - Preferred to have interest in Ambient light sensor, Proximity sensor, Long wave length Infrared sensor, Humidity sensor design. - Preferred to be familiar with basic semiconductor process. b. Support Mass Production Testing c. Design Document/Report Support
1、Develop FPGA for •3GPP 4G/5G physical layer •Other communication tester 2、Provide clear interface for upper layer. 3、Study related specification. 4、Develop in verilog language. 5、Use Matlab for verification. 6、Use Xilinx Vitis tool for FPGA implementation.
Job Description - Design digital IP per product specification, including functional verification. - Optimize area/performance/power per key index from various design flows. - Design sub-system or SoC architecture, including integration and higher level functional verification. - Execute design flows like synthesis, RTL QoR check, conformal check, power simulation, FPGA bit gen, etc. - Collaborate with cross-functional teams, including software, hardware and algorithm. Qualification: - Strong understanding of FPGA and ASIC design principles. - Proven RTL design experiences based on Verilog language. - In-depth understanding of industrial bus protocols - AXI, AHB and APB. - Fluent in using frontend EDA tools. - Capable of writing scripts to automate design tasks by using industry common programming language.
1. GaN功率元件設計與開發 2. 產品功能測試 3. 產品可靠性測試 4. 有機會至日本公司培訓
1. AI Engineer is responsible for understanding the business problems, identifying/applying right AI or cognitive computing technologies to solve problems and involving in formulation and execution of technologies recipes for commercial deployment. 2. Understand the business problem, challenge of existing technologies and areas of application for AI technologies. 3. Developing Data cleaning, Data preprocessing, feature engineering, modeling and so on. 4. Identify and choose right AI or cognitive computing technologies for solving problems and formulate AI recipes for development. 5. Develop required machine learning models or prototype applications applying formulated AI recipes and verify the problem/solution fit. 6. Involve in development of AI Platform and AI projects. [Must Have] 1. B.S. Degree in Computer Science, Information Systems, or other related fields. 2. Familiar with machine learning model(DNN/CNN/RNN) 3. Familiar with machine learning, image recognition, or NLP 4. Proficient in Python, C++, or equivalent languages 5. Experience on TensorFlow, Caffe, Keras.
1.五年以上經驗 2.數位邏輯設計並熟悉RTL Coding架構 3.協助開發與驗證FPGA RTL code 4.協助驗證Video/Image Processing IP