1. IR/EM power model flow 2. IP characterization flow 3. pre-sim/post-sim flow 4. Aging flow 5. Bit-cell evaluation flow 6. CAD and QA flow 7. CAE and QA flow 8. Reliability check flow 9. Fast Monte-Carlo 10. Design margin check 11. Memory compiler 12. FE flow integrate 13. BE flow integrate
1.Addressable RGB LED 應用之控制系統韌體設計 2.RGB LED顯示屏之控制系統FPGA HDL設計 3.RGB LED顯示屏之控制系統嵌入式系統開發(driver porting, service program and Web UI) 4.測試治具應用軟韌體開發
1. Mini LED BLU local dimming分區灰階控制之韌體設計 2. Addressable RGB LED應用之定址及灰階控制之韌體設計 3. 小間距RGB 顯屏控制、車燈控制之韌體設計
1. Calibre PERC/LVS/DRC command file維護及in-house command file撰寫 2. 驗證自動化流程開發(Shell/TCL/Ptyhon/Perl) 3. Physical Design/Layout 自動化程式及QC程式開發 (Shell、TCL、Python、Html/CSS、Java) 4.具Innovus/ICC2使用經驗，熟Cadence DBA語法尤佳 5.具 12/7/5nm Physical design experiences is a plus.
1. Built up block/SoC-level verification environment using SystemVerilog/UVM, and simulation patterns generation. 2. SoC integration, bus fabric/high speed peripherals connection verification. 3. SoC clock, reset, power flow(UPF), ATE(scan/MBIST/analog macro test)RTL design verification.
1. Memory/SRAM circuit design 2. Memory/SRAM compiler development 3. Supervision and co-work with layout members 4. Memory/SRAM circuit simulation and design verification. 5. Memory/SRAM yield improvement & test IP development. 6. SRAM liberty characterization flow. 7. SRAM library maintaining.
1.學習基本數位電路與RTL Coding觀念 2.Design verification by RTL-sim, 與code coverage 改善 3.自動化程式建置 4.數位電路耗電分析
1.Familiar with block-level/high-speed IP physical imeplementation by Innovus/ICC2 2.Familiar with Laker, Virtuso, Calibre for layout verification 3.Familiar with STA for timing closure. 4.Programming skill for flow automation is plus
1.學習數位IC設計流程 2.設計流程自動化程式建置 3.數位電路PPA分析 4.前瞻數位設計流程開發和評估
1. Requirement Analysis 2. Algorithm Development 3. System Architecture Design 4. System Modeling 5. Technical innovation research
1. 數位電路設計 (Verilog) 2. 數位電路驗證 (SystemVerilog , UVM , Assertion) 3. 了解MIPS / CPU / Pipeline 架構 4. 熟悉 AXI / AHB protocol 5. 優化電路品質 (Power,Performance,Area) 6. 操作EDA Tool (synthesis , cdc , power , ...)
1. 熟PCIe/USB等高速介面 2. 根據系統規格，撰寫硬體描述語言 3. 負責電路的合成與分析 4. FPGA compile and verification
1.Hardware architecture design and RTL coding 2.Verification and synthesis flow (Coverage, CDC)
1.SRAM front-end/back-end model file verification 2.SRAM front-end/back-end model file auto generation 3.Script develop and maintain 3.Co-work with tool vendor
1. Survey/ Design/ Implement FFE, DFE, LMS & MMSE for PCIE. 2. NCVerilog程式設計、模擬 3. 協助IP應用/授權之除錯與驗證
1.Frontend design flow and quality check development. 2,Power domain plan and UPF/IEEE1801 power internt edit. 3.Advanced design methodology study and evaluation. 4.Interact with RTL & APR and provide them with timing/power/congestion/area proposal. 5.Run SYN/STA/Power/LEC/RDC verify and feedback.
1.參與UVM(Universal Verification Methodology)驗證環境建立及驗證程式開發 2.FCOV 驗證規劃 3.參與專案之SoC Level, IP Level ,Sub-system Level驗證計畫及驗證環境開發 4.產品應用 : PCIe/USB/UFS/SATA/Serial Attached SCSI (SAS)
1.Frontend design flow and quality check development. 2.Power domain plan and UPF/IEEE1801 power internt edit. 3.Advanced design methodology study and evaluation. 4.Memory BIST study and implementation