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3/26 [R&D] PRODUCT ENGINEER -DEG SISTRAT&OPS PE GRAPHICS

  • 台中市后里區
  • 2年以上
  • 大學

Apply here: https://micron.wd1.myworkdayjobs.com/External/job/Taichung---Fab-16-Taiwan/PRODUCT-ENGINEER--DEG-SISTRAT-OPS-PE-GRAPHICS_JR41018 The general responsibilities of the position are the following: • Prepare for new DRAM products and coordinate resources, testing, and analysis over the lifecycle of the product • Verify the DRAM functionality for new chip designs by performing measurements in ATE (Automatic Test Equipment), oscilloscope, multimeter • Develop and validate device testing programs in ATE • Perform test program simulations • Discuss results with design and process experts and assess root causes of fail mechanisms • Improve testing coverage, quality and on Graphic Dram products • Be responsible for the test flow, review and sign off test program release to ensure quality control • Develop creative testing algorithms to improve testing efficiency • Identify causes of low yield through detailed analysis • Work closely with various engineering groups in resolving process/defects related issues • Perform electrical/physical failure analysis to understand the failure mechanism relating to defects / fab process • Collaborate with test engineering teams to define and secure vital test fixtures for memory and system testing • Conduct electrical failure analysis of the graphics products through different phases of the product life cycling such as qualification, high volume manufacturing and customer returns. • Extensive usage of data parsing and data analysis for improving yields, test times and quality of the products. • Being a team player is mandatory for us. We enjoy working in a multicultural and international environment. Qualification • University master degree in electrical engineering, physics or computer science • Background in semiconductor physics, digital and analog electronics • Programming skills in one or more common languages • Analytical thinking and structured problem-solving skills • Proactive and independent way or working • Proficient English skills Being a team player is mandatory for us. We enjoy working in a multicultural and international environment. Job experience fitting to the job description is appreciated; First-time employees, however, are explicitly encouraged to submit a job application.

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11~30人應徵

3/26 [R&D] DRAM Product Engineer - Mobile Product

  • 台中市后里區
  • 2年以上
  • 大學

Apply here: https://micron.wd1.myworkdayjobs.com/External/job/Taichung---Fab-16-Taiwan/DRAM-Product-Engineer---Mobile-Product_JR40551 Responsibilities and Tasks: - Treat Mobile DRAM products - Yield improvement - Fail analysis (both data analysis and tester analysis) - Implement fixes for fails (Design or Process) - Work with Quality Assurance (QA) Teams on customer returns to identify new tests Partner with Engineering , Manufacturing and Marketing - Collaborate with Micron Memory Japan, Product Engineer team - Resolve problems, develop or validate device testing programs - Evaluate data sheets and provide feedback to Application Engineers Provide Technical Training and Expertise - Provide On-the-Job Training (OJT) for new engineers - Provide Basic training course of E-Learning - Instruct on data presentation and techniques Education: - Required: Bachelors Degree: Electrical Engineering / Compute Science - Desired: Bachelors Degree: VLSI / Semiconductors/Nanotechnology - Preferred: Japanese speakers are welcome Environment: Office - Shift: 8+ hour shift, 5 days a week, Days,

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大於30人應徵

3/26 Engineer - DEG PE Design Readiness

  • 台中市后里區
  • 經歷不拘
  • 大學

Please apply here: https://micron.wd1.myworkdayjobs.com/External/job/Taichung---Fab-16-Taiwan/Engineer---DEG-PE-Design-Readiness_JR43892 As a Product Engineer at Micron, you will be part of a forward-thinking team of engineers that solves complex problems, responsible for enabling Micron’s products with flawless and issue free release to both internal and external customers. Product Engineers are the key interface between Research and Development, Manufacturing, Marketing, and Quality Assurance departments. As DRAM Design Readiness engineers, we are responsible for driving DRAM validation activities to ensure all current and future products achieve the highest level of performance, quality, and specification compliance. Our focus is to validate new DRAM design circuitry, debug and root cause silicon bugs, and to partner with teams in Design, System Compatibility Engineering, and Product/DRAM Health on the most effective and efficient solutions. We are innovators at heart who help define exciting new DRAM characterization techniques and HMV trim solutions to optimize DRAM performance and margin in application. Our job is to drive DRAM design to design alignment with emphasis on finding root cause to ensure future products do not repeat known circuit bugs. Work with Design, Verification, and Validations teams on corrective actions. • Ensure DRAM silicon performance meets all manufacturing and design requirements. • Ensure current and future products are best in class for system level I/O margin. • Develop new testing strategies to enable more efficient and effective validation of DRAM specifications (i.e. char flows/improved BKMs) • Drive circuit implementation standards across DRAM product families to achieve outstanding performance, power, and reliability. Examples: High-Speed IO, DRAM data sheet specification, and RHR. • Support pathfinding and enablement activities on new architectures. • Collaboration with global and multi-functional teams. 【Nice to Haves】 • Experience with high speed (Gigabit links) equalization techniques. • Experience with optimizing transceiver characteristics in production (wafer, package, module). • Experience with system IO characteristics and tuning capabilities. • Experience with automated test equipment and common laboratory equipment like oscilloscopes / spectrum analyzers are likely a given for a successful candidate. 【Education】 • BS or MS in Electrical or Computer Engineering, or equivalent

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11~30人應徵

3/22 新創團隊/ FPGA研發工程師

  • 台中市南區
  • 1年以上
  • 大學

◆ 發展領域為高階車載感測器相關,使用FPGA(verilog)研發感測器相關功能的實現與驗證。開發平台為Xilinx VIVADO。 ◆ 團隊具友善的環境與平衡生活的工作環境。 ◆ 歡迎具研發熱忱、團隊合作精神的人才一同加入。 (1) FPGA開發/架構規劃與功能實現 (2) 根據需求開發IP及其功能驗證 (3) 熟悉Xilinx開發平台者尤佳 (4) 完成主管交辦事項

待遇面議 員工75人
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0~5人應徵

3/29 FPGA工程師

  • 台中市北屯區
  • 經歷不拘
  • 專科

1. 負責 FPGA 功能驗證、程式開發、測試、除錯及維護 2. 熟悉 FPGA: >> Familiar with Verilog RTL design. >> Familiar with RTL simulation, timing analysis using Xilinx Vivado Design Suite. >> Familiar with FGPA digital validation and test pattern generation using (system)ILA, logic analyzer, high-speed oscilloscope, etc. >> Familiar with Xilinx FPGA serdes IO, and selectIO. >> Familiar with Xilinx IP design and packaging. >> Familiar with at least one Xilinx FPGA device. >> Familiar with Xilinx HLS is a plus. >> Familiar with Xilinx Zynq SoC is a plus. 3. 熟悉 Xilinx、Altera FPGA 架構與設計 4. 熟悉 VHDL、Verilog、C、C++ 等 5. 具I2C、SPI通訊介面運作經驗者

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0~5人應徵

呃拍謝,搜尋結果好像很少

可以嘗試調整條件、或看看你專屬的推薦工作

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3/25 Digital IC Designer (數位IC設計工程師)

  • 新竹市
  • 1年以上
  • 大學

Be in charge of one of below items. 1. Digital IP coding (AMBA, Peripheral, MAC, Modem..) 2. SoC architecture define 3. MAC Layer protocol architecture define 4. Audio codec coding (I2S, SPDIF...) 5. Digital signal processing (Filter.. ) 6. IC design integration (top integration/synthesis/timing closure/DFT) Extra skill is plus. 1. Familiar with Zigbee, Bluetooth or WiFi system is plus. 2. Familiar with audio related processing is plus. 3. Familiar with Perl/Makefile/tcl is plus. 4. The passion to create a wonderful thing.

待遇面議
11~30人應徵

3/24 CAD Engineer

  • 新竹市
  • 經歷不拘
  • 大學

1.Support and maintain EDA tools and flows used in the digital IC implementation. 2.Design and develop methodologies, automation scripts, and design flow. 3.Manage version control system (Git/SVN), issue tracking system, and CI/CD flow. [Requirement] 1.Python/Perl/TCL/Shell programming skills. 2.Familiar with EDA tools for IC design flow. 3.Basic knowledge of Verilog or SystemVerilog HDL.

待遇面議
0~5人應徵

3/22 Technical Service Manager: Consultant for RISC-V Architecture/CPU/SoC

  • 新竹市
  • 5年以上
  • 碩士

1. Familiar with RISC-V architecture, RTL coding, SoC development experience. 2. Collaborate with Sales teams in promoting Andes customization service. 3. Identify potential customers' needs and provide support. 4. Act as a trusted advisor to the customer. 5. Coordinate with R&Ds for New/Customized product as PJM. 6. Write technical tutorials. 7. Provide customized training courses to customers.

待遇面議 員工370人
0~5人應徵

3/20 研發替代役-應用工程師(台南辦公室)

  • 台南市中西區
  • 經歷不拘
  • 碩士

1. IOT/WinNexus軟體開發與測試,IOT硬體與模組設計與測試。 2. 微控制器(MCU)程式編程。 3. 專利撰寫與發表。 加入誠雲科技,可以在有經驗的同事帶領下,學習運用所學,做出世界級大公司所需要的解決方案,測試驗證並且推展商品。 公司將按照所學與興趣安排適合的位置。

待遇面議 員工30人
6~10人應徵

3/25 數位系統工程師/Digital System Engineer

  • 新竹市
  • 經歷不拘
  • 碩士

## 職務說明 - 應用於雷達、通訊系統之天線場型測試、微波系統效能整合測試與分析。 - 微波系統校準開發與整合測試。 - 數位介面測試驗證。 - 開發自動化測試流程。 - 系統效能問題排除與優化。 ## 技能要求 - 熟悉數位週邊控制經驗、或是具備微波、類比、數位訊號處理等相關經驗 - Python自動化程式開發、C程式語言 ##加分條件: - 熟悉embed 程式開發 - 熟悉測試機台操作 - 熟悉FPGA開發流程 - 雷達/通訊數位訊號處理

待遇面議
6~10人應徵
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