Minimum qualifications:
• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 10 years of experience in design verification.
• Experience with functional verification and performance validation of modern mobile processors, microarchitecture, and related technologies.
• Experience developing and maintaining verification testbenches, test cases, and test environments.
Preferred qualifications:
• Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science.
• Knowledge of ARM Instruction Set Architecture.
• Knowledge of general purpose operating systems (e.g., Linux and Android).
About the job
Our computational challenges are so big, complex and unique we can't just purchase off-the-shelf hardware, we've got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google's services. As a Hardware Engineer, you design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.
With your technical expertise, you lead projects in multiple areas of expertise (i.e., engineering domains or systems) within a data center facility, including construction and equipment installation/troubleshooting/debugging with vendors.
Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Responsibilities
• Verify designs for future CPU developments.
• Build functional verification infrastructure (e.g., unit, multi-unit, core, and subsystem level verification).
• Verify and validate performance for both pre-silicon and post-silicon.