Perform FPGA emulation and implementation
1. Implementation of chip firmware, API and Driver 2. Support FPGA emulation and chip verification 3. Chip RMA debugging/
and simulation of NAND flash 3. ECC error bit detectable rate emulation by C++
transmission line design. 4. Defines and documents (RTL or HLS) changes required for emulation/FPGA. 5. Tests and debugs
lifecycle development, including FPGA emulation for MAC mainly, involve with world-wide design team to complete the pre-silicon
and full-chip static timing closure 3. Develop FPGA emulation environment for design verification and demonstration 4.
##工作內容 - 相控陣列雷達或通訊系統規格分析 - 系統模擬器建立並執行系統模擬(Emulation & Simulation) - 系統效能分析與可行性評估 - 系統可靠度規格制定 ##技能條件 - 熟悉相控陣列系統，具備主動式相控陣列雷達
for regression testing, software emulation and other needs and continue to increase automated test coverage • Cross-nation and
模擬物聯網設備的仿真硬體環境，讓設備韌體可以在該環境實體運作(firmware emulation)幷進行模糊測試，以找出該設備潜在的資安漏洞
of EDA tools (Cadence NC-Verilog, Synopsys DC, Synopsys PT) 4. Knowledge of FPGA emulation flow 5. Ability to problem solve
Synopsys is uniquely positioned to offer the most complete verification solution in market today.The emulation platform of
of EDA tools (Cadence NC-Verilog, Synopsys DC, Synopsys PT) 4. Knowledge of FPGA emulation flow 5. Ability to problem solve
emulation. • WiFi performance/data traffic debug and validation on silicon include chip bus traffic. • The Job content includes
the behaviors of bare metal cases, doing hw/sw co-debugging, and how to use the cutting edge emulation platforms. What You
【工作內容】 1. Logic design and verilog RTL development 2. Perform FPGA emulation and implementation 3. Develop re-usable
simulation/emulation, test validation to power-on bring up phases. Specify and implement test cases while actively seeking
模擬物聯網設備的仿真硬體環境，讓設備韌體可以在該環境實體運作(firmware emulation)幷進行模糊測試，以找出該設備潜在的資安漏洞
【工作內容】 1. Logic design, verilog RTL development and verification 2. Create re-usable IP 3. Perform FPGA emulation and
designs ‧ SoC and emulation platform design ‧ SoC system performance analysis 【Requirement】 1. Bachelor's or Master's
1. RTL design of in-house IP and peripheral interface 2. Whole chip integration, simulation and verification 3. Low power design 4. Whole chip performance analysis