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5/23 Product Engineer (PERC)

  • 新竹市
  • 3年以上
  • 大學

Position Description: • Development of efficient PERC decks for Cadence Physical Verification tool with leading foundry processes and design kits. • Cooperate with foundry partners on various outsourcing projects for verification flow. • Communicate with R&D to capture customer needs and requirement spec. • Work closely with early adoption customers to track and resolve product issues. • Be a team-player to co-work with R&D/PE on problem resolving and the solution delivery. Position Requirements: • MS in Electrical Engineering (EE), Computer Science (CS), Physics or related area (or equivalent) and at least 3 years of experience with Physical Design/Verification tool support/development. • Excellent script programming skills on TCL and Perl are required. • Good communication skills in English. • Good problem-solving skills. • In-depth knowledge on either ESD, ERC, PERC, gate level netlist, and circuit structure is preferred. • Knowledge of software development cycle is preferred.

待遇面議 外商公司 員工650人
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0~5人應徵

4/19 Sr Facilities Specialist(資深總務管理師)

  • 新竹市
  • 5年以上
  • 大學

Position Description: This position supports the Facilities group operations involving projects, maintenance, environmental, business travel, health and safety, administrative, financial tracking, documentation, and other related functions. Position Requirements: - Engage, negotiate, and manage onsite vendors (both reoccurring and preventative maintenance). - Provide other Workplace Experience program administration, including but not limited to. - Coordinates multiple projects (such as moving, repair & maintenance) with efficiency and proficiency in meeting timelines and schedules. - Keep track of purchase orders, commitments, invoices. - Assist in preparing presentation materials and updating periodic reports. - Manage pantry and office supplies and ensure the cleanliness of the office/pantry/open area environment. - Administer contracts for various services related to property operation and maintenance, such as janitorial, security, engineering and so on. - Monitor the quality of services and goods provided by vendors and review the costs/services/goods monthly. - Proficient with Microsoft Office suite products (Excel, Word, PowerPoint, etc.). - Ability to work in parallel on several areas, and under pressure; Ability to prioritize tasks. - 5+ Years’ experience in construction or facilities field. - Ability to work independently. - Ability to articulate well in English. - Strong communication and interpersonal skills - Good team player and motivated.

待遇面議 外商公司 員工650人
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6~10人應徵

4/30 Product Validation Engineer (Pegasus)

  • 新竹市
  • 3年以上
  • 大學

Job Description: • Assuring the quality of physical validation tool Pegasus by analyzing existing test suites • Validating code changes and integrating customer cases as part of regression test suite • Working closely with PE and R&D for new features/enhancements of Pegasus DRC/FILL/LVS/PERC including deck coding/QC pattern generation • Developing precise test cases for DRC/FILL rules based on foundry decks Position Requirements: • Must have 3 or more years of experience in developing and supporting physical verification activities in DRC/FILL area • Solid knowledge of foundry layout rules and device identification concepts • Working experience with UNIX and knowledge for shell/tcl scripting languages (familiar with perl and/or python is a plus) • Should be able to work independently and have adequate personality & communication skills to cooperate with cross functional groups

待遇面議 外商公司 員工650人
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6~10人應徵

5/08 IT-Sr Systems Engineer

  • 新竹市
  • 4年以上
  • 大學

Position Description: · Work on all user requirements/issues thru Jira tickets. · Provisioning of laptop, desktops, servers & thin clients. · Receive user calls, create IT tickets, fix IT issues, or assign tickets to related IT team members. · Work with other members of the IT to ensure high uptime of all IT services i.e., Site LAN / WAN, servers, etc. · Attend meetings to collaborate with other members of the organization. · Co-Work with our partners / vendors for deploying infrastructure and providing operational support. · Provide on-site standby support during scheduled and emergency (unplanned) maintenance (e.g., power maintenance, network / server / system upgrade, outage). · Adhere to asset management process. Position Requirements: · Should have hands on skills on computer OS installation and basic troubleshooting. · Ability to detect all service-impacting issues, accurate triage, partner communication, apply urgent workaround, service restoration, and post-incident follow-up. · 4+ yrs of experience with general IT infrastructure support (network, unix/windows/mac system). · Good verbal and written communications skills in both Chinese and English. · Hands on experience with firewall and load balancer deployment, configuration, and support. · BS degree in Computer science or related areas (or equivalent experience).

待遇面議 外商公司 員工650人
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11~30人應徵

3/06 Design Engineer (Memory Modeling Portfolio)

  • 新竹市
  • 經歷不拘
  • 碩士

請至Cadence官網投遞履歷: https://cadence.wd1.myworkdayjobs.com/External_Careers/job/HSINCHU/Principal-Design-Engineer---Memory-Modeling-Portfolio_R44090 As a Principal Design Engineer you will be responsible for scheduling, designing, developing, and supporting IP models of system level memory such as SDRAM (LPDDR, HBM), NAND Flash (ONFI/QSPI/OSPI), eMMC, SD Card, DFI, and UFS models for use on hardware based verification products. Additional responsibilities include the following: Updating, maintaining, documenting, and supporting existing system level memory model products. Perform as individual contributor for RTL design, verification, productizing, and documentation of memory IP. Interface with internal and external customers to work on diverse problems and solutions related to emulation, simulation, or verification. Perform as team member toward cross verification of and cross training in memory IP as well as in developing and using lifecycle processes to ensure product quality. Must be able to analyze customer & vendor protocol requirements and execute on complex projects from requirement to delivery to post-delivery support Communication & collaboration with peers & internal partners as well as strong individual/independent R&D skills are required. Regular field AE & external customer interaction and representing Cadence to external customers is required for support of memory models. Must be able to facilitate discussions with AE & customer. Ability to mentor less experienced engineers &/or participate in cross-functional projects Must participate in team processes as well as evaluate and recommend process improvements. Required Experience: The position requires BSEE with at least 7 yrs of industry experience in designing hardware systems OR a MSEE with at least 5 years of experience in designing hardware systems Must have excellent communication skills with both written and spoken English. Expert level knowledge of RTL design using languages Verilog/SystemVerilog is required along with experience using RTL verification tools and flows. Debugging experience. Experience with team-wide collaboration tools and process. Drive and ability to schedule workload and plan own tasks effectively. Strongly recommended: Verification experience using Cadence simulation and/or emulation products is highly desired. Programming experience with scripting languages like Perl, TCL, C-shell is strongly recommended. Verification experience using UVM test environments is highly desired. Experience in memory sub-system design and operation is strongly recommended.

待遇面議 外商公司 員工650人
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6~10人應徵

5/10 Application Engineer (DDR/SerDes IP)

  • 新竹縣竹北市
  • 10年以上
  • 碩士

Position Description: •Providing direct technical support to customers in presale stage to persuade customers to adopt Cadence Design IP solutions for their applications •Interface with customer architects and IP business unit to enable evaluation of application specific IP performance and features per customer’s SoC requirements. •Working with the sales team to manage the IP activities in the region to achieve a high customer satisfaction rate and for building strong customer relationships •Providing customer feedback on new/existing requirements for Design IP usage from customers to the R&D business unit •Providing direct technical customer support and assistance to enable customers to successfully integrate/use Design IP in their SoC •Writing application notes and review protocol specifications for Design IP Position Requirements: •10+years relative working experience with M.S. Electrical/Computer Engineering (or similar degree) •Experience in SoC design •Good understanding of SoC architecture •Experience with DDR or PCIe or Ethernet or USB subsystem hardware or firmware developing, testing or debugging •Good understanding DDR or PCIe or Ethernet or USB protocols •Good written and verbal communication skills and problem solving skills are required •Ability to conduct technical meetings, presentations, seminars and training to customers and to the sales team •Travel within AP region may be required. •Good understanding of the semiconductor IP marketplace and ecosystem is a plus

待遇面議 外商公司 員工650人
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6~10人應徵

4/30 Solutions Engineer (Pegasus)

  • 新竹市
  • 3年以上
  • 大學

Join us in the development of Pegasus, our next-generation massively parallel DRC (Design Rule Check) product! Your role will be analyzing how our EDA tool, Pegasus, performs in customers’ most complicated IC designs, studying the culprit of tool misbehavior and performance bottlenecks, and propose enhancements based on your observations at customer site. Along the way, you will be trained to evaluate a tool not just by 1 or 2 core algorithms, but by the infrastructure design, the whole program flow, and the interaction between software and hardware. To apply for this position, you will be required to • Be familiar with C++, Python, or any other object-oriented programming language. Prior experience of developing large project is a plus. • Have good English reading and writing skills, so you will be able to communicate your thoughts and findings with R&Ds located at other sites around the globe. In 3 years, we hope you will … • Gain a bird’s-eye view of Pegasus’ infrastructure, including its pipelined-stream technology and distributed computation, and how to optimize it in user’s environment. • Be able to share technical details of Pegasus with colleagues from other departments (product engineers, QA engineers, etc.) • Be a team player!

待遇面議 外商公司 員工650人
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11~30人應徵

5/10 Software Engineer (Virtuoso Interactive and Assisted Route)

  • 新竹市
  • 2年以上
  • 碩士

Job Description: At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Virtuoso Custom Layout Interactive and Assisted Route team is looking for exceptional individuals skilled in C++ development, IC layout techniques and custom circuit design. You'll focus on Virtuoso interactive and assisted route software development. You're also responsible for implementing, verifying and maintaining physical design software modules for custom integrated circuits in the Advance Node areas of Virtuoso Layout Suite. Requirements: 1) MS/PhD in EE/ECE/CS graduate or BS with at least 2 years software development experience. 2) Strong C++ development and object oriented design skills. 3) Software development experience in EDA is preferred. 4) Experience with UNIX and/or LINUX software development platforms. 5) Good English communication skill. 6) Familiarity with Cadence's Virtuoso layout framework, SKILL language programming or OpenAccess database will be a plus We're doing work that matters. Help us solve what others can't.

待遇面議 外商公司 員工650人
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大於30人應徵

5/30 藥師

  • 台北市松山區
  • 3年以上
  • 大學

益華藥局重視員工在工作及生活兩方面的健康平衡,強調人性管理企業文化,使員工儘可能降低一般醫院藥局及社區藥局員工經常面臨的排班時間不可預測性。有關益華特殊的員工排班安排方式。 ▲我們重視每位前來益華藥局應徵的藥師朋友們,有關藥師

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0~5人應徵

5/30 送貨員/業務司機

  • 苗栗縣竹南鎮
  • 經歷不拘
  • 學歷不拘

1.自行裝卸貨物 2.客戶巡問補貨 3.主管交代事項完成 4.需支援內場 5.工作時間為清晨 6.需長期,短期勿擾 7.基本都是騎摩托車送貨。

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0~5人應徵

5/22 隔間裝潢學徒(提供房租津貼 歡迎外縣市求職者投遞)

  • 苗栗縣竹南鎮
  • 經歷不拘
  • 學歷不拘

1、協助專業技師進行食品業及物流業相關內裝隔間工程施作 (包含庫板隔間安裝工程、冷凍庫板安裝、天花板安裝等) 2、工程案子全台都有,需要配合外地工作 3、公司位在苗栗竹南,外縣市者提供房租津貼

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0~5人應徵

6/03 吊車起重操作員(50K)

  • 台中市西屯區
  • 2年以上
  • 學歷不拘

操作及監控吊車及其他起重設備,以升移物料並置入預定位置 有意願者請直接電話聯繫0919119700 洽林先生 *需有2年以上經驗 *職業聯結車駕照 *五噸以上移動式吊車證照

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0~5人應徵

5/28 藥師

  • 台北市松山區
  • 3年以上
  • 大學

益華藥局重視員工在工作及生活兩方面的健康平衡,強調人性管理企業文化,使員工儘可能降低一般醫院藥局及社區藥局員工經常面臨的排班時間不可預測性。有關益華特殊的員工排班安排方式。 ▲我們重視每位前來益華藥局應徵的藥師朋友們,有關藥師

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0~5人應徵

6/03 Software Engineer (Pegasus PERC)

  • 新竹市
  • 3年以上
  • 碩士

Job Description: The Physical Verification R&D Software Engineering role is a multi-faceted position encapsulating a mix of physical verification software development, algorithm development, software debugging, performance optimization and accuracy analysis. R&D engineers collaborate with a large team of EDA professionals across multiple cultures to create and deliver best in class next generation software for physical IC development. The R&D engineering can work on complicated applications and interface them with other high connected applications in a large suite of tools to enable next-generation physical verification solutions with superior performance and usability. R&D engineers develop code that satisfies the requirements for successful semiconductor design deployment. Desired Skills and Experience (with different levels of experience): • 3+ years of experience in software development using C/C++, with a focus in working with complex algorithms and performance • 1+ years of experience using Linux • Must be a fast learner and must demonstrate strong aptitude for out-of-the-box thinking and problem solving • Algorithmic knowledge relating to graphs is a plus • Experience in deck development for LVS is a plus • Experience in physical signoff methodologies within the Physical implementation environment would be an added advantage.

待遇面議 外商公司 員工650人
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0~5人應徵

5/10 Software Engineer (Quantus)

  • 新竹市
  • 3年以上
  • 碩士

Job Description 1. This software engineering position will support and improve the implementation the state-of-art extraction products in a fast-paced, small team environment. 2. We are looking for a highly motivated software engineer to work on the development new applications for parasitic extraction. 3. This person will be responsible for implementing new techniques, algorithms and library API in C++. Position Requirements: 1. Strong algorithm background, programming skills and implementation in dealing and processing of large amount of data 2. Good communication skills and desire to learn in a startup like environment 3. Knowledge and experience with computational geometry, layout connectivity, parasitic extraction, capacitance modeling, FS development is a big plus 4. Experience in C/C++ coding, with EDA physical verification or extraction background preferred 5. Knowledge in UNIX shell and scripting language like TCL, Python, Perl 6. Minimum of 3 years of software development experience plus a MS/PhD in CS

待遇面議 外商公司 員工650人
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11~30人應徵

5/10 Application Engineer (Tensilica IP)

  • 新竹縣竹北市
  • 10年以上
  • 碩士

Cadence-Tensilica is the leading DSP/Processor IP technology in the fast-growing IC design industry, also well-known for its customizable Xtensa configurable microprocessor core. It is widely used in a variety of market segments today, such as Mobile, Home Entertainment, Communication, IoT, AI and Imaging in chip designs. With more than 300 customers world-wide, we work as one team to provide design support, advise and execution of complex technical/business needs, along with our passion and agility in attitude. In this position, you will do: + Collaborate with Business, Engineering, and other internal teams to provide customers the best practices of design along with our IP technology. + Work with remote and multi-site teams for hands-on technical support and competition benchmarking. + Be expected to deep dive into the technical details in different aspects centered with Processor/DSP technology. + Assist product marketing and engineering support team in pre and post sales situations. Basic Qualifications + Master’s degree in Computer Science/Electrical Engineering, or related technical discipline. + 10+ years’ experience in Digital SoC Design, or Embedded Software Engineering from board to system level. + Knowledge of computer architecture concepts (memory, microprocessors/controllers, well known CPU architectures, and DSP) is a must. + As well understanding on one of AI, communication, Multiple-media segments, and have domain technology. + Expert-level programming skills in C/C++ and Python. + Fluent in English. The following Qualifications are a Plus: + Extensive knowledge in SoC Integration and Design. + Comprehensive knowledge in embedded software tooling usage (compiler, linker, profiler, debugger). + Experienced SoC architecture design with DSP, CPU architecture. + Knowledge of Tensilica processor technology, and was have experienced to use

待遇面議 外商公司 員工650人
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0~5人應徵

6/03 (短期計時) 行政助理/工讀生

  • 桃園市中壢區
  • 經歷不拘
  • 高中

誠徵~ (短期/計時) 行政助理/工讀生 工作內容: 1. 協助公司報表 整理、歸檔。 2. 協助公司庶務性工作。(如:照片下載、商訊更新、檔案管理..等)。 3. 協助倉庫領、退料與收領機器簽收。 4. 協助電腦資料Keyin、列印。(需具備電腦Office文書處理能力) 。 5. 客服工作(接聽電話/立任務單/轉原廠維修服務)。 6. 收發工作及郵務投遞。(需會騎摩托車) 7. 其他主管交辦事項。

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11~30人應徵
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