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找公司： Qualcomm Semiconductor Corporation_高通半導體有限公司
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    【學期&暑期實習】業務工程師 Sales Engineer

    • 新北市中和區
    • 經歷不拘
    • 大學

    【公司介紹】 Join WT！Upgrade Your Life and Future！ 文曄是全球前三大的IC代理商，身處IC原廠與客戶雙向資源的工作環境，您可獲得IC元件的最新研發消息，看見未來趨勢，亦可掌握市場最新產品資訊，抓住銷售新契機，更可以獲得以下資源 : ◆ 培養軟、硬實力 在文曄擔任業務工程師，您可以了解通路商的定位，擴增對半導體產業的廣度 (歐美原廠與客戶端)，並可累積業務技能，如客戶關係建立、價格管理、高端談判技巧和快速應變市場競爭等。 >代理產品線包含ADI,MPS, ON Semi, Renesas, Richtek, ST...等，更多產品線資訊，歡迎參閱文曄官網。 >客戶包含鴻海、和碩、廣達、華碩、緯創、仁寶、台達、光寶、研華...等，並將技術應用於5G通訊/伺服器 /車用/醫療/IOT等領域。 ◆ 完善訓練 以業務工程師的定位為出發點，加強對於產業及企業營運流程的知識。藉由精實的訓練規劃，讓您了解業務工程師的工作內容。 ◆ 主管職涯指引 主管為您職涯指引，規劃進階目標與發展，讓您處在有變化與挑戰性的工作環境，未來發展更不受限。 【工作內容】 ◆參與客戶開發、部門會議 ◆蒐集與分析產品、市場資訊，試著挖掘新機會 ◆學習與客戶的溝通應對技巧(跟隨前輩拜訪客戶) → 表現良好者，可轉為長期實習並獲文曄預先聘用，更有機會加入文曄Want Talent 菁英培育計劃喲! 【參考資訊】 想瞭解更多文曄資訊及工作內容，快來聽聽學長姐怎麼說: Want Talent 菁英培育計劃招募影片→https://youtu.be/5Ae9W2EY1ng Want Talent 業務工程師分享→https://www.youtube.com/watch?v=N-Cc4E8dbW4 歡迎理工科系的您，加入文曄業務工程師暑期實習，以不同於研究又不脫離所學專業的工作型態，做為職涯發展起點，為自己創造更多的市場價值與發展可能性！ #第一手接觸原廠與客戶科技產品趨勢 #不當RD卻不脫離專業技術

    時薪183~200元 上市上櫃 員工9000人
    11~30人應徵

    高級會計管理師/副理

    • 新北市中和區
    • 2年以上
    • 大學

    文曄提供良好的發展舞台及完善的訓練規劃，透過參與專案與海外子公司合作，能快速拓展產業及國際視野，讓您在快速變遷的環境下仍發展不受限! 【工作內容】 1. 會計相關帳務處理及結算 2. 編制事業體之每月會計報表，並針對異常項目進行分析性覆核 3. 編制事業體合併報表及相關明細資料 4. 稅務規劃及風險管理 5. 協助執行決議事項及各項專案財會項目之推動 6. 提供優化建議與跨部門溝通協調解決問題

    待遇面議 上市上櫃 員工9000人
    6~10人應徵

    6/06 PMIC Product Test Engineer, up to Staff (Hsinchu)(3061565)

    • 新竹市
    • 5年以上
    • 碩士

    【Job Description】 The PMIC ATE Test Engineer will be responsible for ATE test solutions development, both hardware and software, and participate in data reviews which will require close collaboration with design, system, process, product, manufacturing engineers and vendors. The job also requires the engineer to drive for short term and longterm test time reduction and yield improvement to achieve milestones without compromising production quality for multiple projects in parallel. We are also looking for an engineer who has strong innovation mindset and able to drive the idea for efficiency improvement on daily routine work. 【Requirements】 • At least 10 years industrial experience in related fields and able to communicate with global teams in both written and verbal English. • Experience with at least 1 ATE test platform: Teradyne-uFlex(VB) , Advantest-93k • Experience with ATE test solution development both on HW design and Test program development • Decent understanding of power management circuit such as LDO, BUCK, BOOST, etc. • Experience with test data, yield, and Bin pareto analysis using Exensio, O+, etc. • Extra Software skills such as C#, Python etc. for tooling development • Proactive and active personality and able to work independently when facing a problem • Strong communications skills to be able to organize effectively and document work thoroughly while working with different groups • Ability to work with common test equipment (oscilloscope, power supply, etc) is a requirement • Interested in machine learning to develop new test methodology for test cost reduction. Knowledge of machine learning and AI model experience is a bonus.

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    0~5人應徵

    5/31 IP Customized and Semi-customized Design Engineer (Hsinchu) (3062643)

    • 新竹市
    • 3年以上
    • 大學

    Digital - Oversees definition, design, verification, and documentation for ASIC development for a variety of products. Determines architecture design, logic design, and system simulation. Defines module interfaces/formats for simulation. Evaluates all aspects of the process flow from high-level design to synthesis, place and route, and timing and power use. Analyzes equipment to establish operation data, conducts experimental tests, and evaluates results. Analog - Oversees definition, design, verification, and documentation for ASIC development for a variety of products. Determines architecture design and circuit specifications based on system level requirements. Is actively involved in all aspects of gate & transistor design from schematic entry to simulation verification. Heavy involvement in overseeing layout and silicon evaluation is also expected. Uses design tools such as Cadence, HSPICE, etc. Provides technical expertise for next generation initiatives. Level of Responsibility - Working under some supervision. - Making decisions that are moderate in impact; errors may have relatively minor financial impact or effect on projects, operations, or customer relationships; errors may require involvement beyond immediate work group to correct. - Analysis/interpretation skills may be required. - May be solicited during strategic planning period. - Using verbal and written communication skills to convey information that may be somewhat complex to others who may have limited knowledge of the subject in question. May require basic negotiation and influence, cooperation, tact, and diplomacy, etc. - Having a moderate amount of influence over key organizational decisions (e.g., is consulted by senior leadership to provide input on key decisions). - Completing tasks with multiple steps that can be performed in various orders; some planning and prioritization must occur to complete the tasks effectively; mistakes may result in some rework. - Exercising creativity to draft original documents, imagery, or work products within established guidelines. - Using deductive and inductive problem solving; multiple approaches may be taken/necessary to solve the problem; often information is missing or incomplete; intermediate data Preferred Qualifications - Master’s degree in Electrical Engineering, Computer Science, or Computer Engineering. - Previous internship/co-op or project work in computer architecture, VLSI, design, logic design, or circuit design. - Understanding of device physics, semiconductor manufacturing process. - Experience of industry tool usage – Design Compiler, Modelsim, Innovus, Primetime, Cadence, HSPICE, etc. - Programming skill in Verilog, VHDL, Python, Perl, TCL, Shell, etc.

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    5/31 IP Standard Cell Team CAD and Automation Engineer (Hsinchu)(3060310)

    • 新竹市
    • 經歷不拘
    • 大學

    General Summary: - Enabling automation system and flows with multiple languages like Perl/Python, skill, SVRF& tcl - Development of Back end tools and APIs - Development of Dashboards using data processing tools and front end HTML - Cross domain automation projects with multiple functional teams like circuit design, Layout and characterization teams. Basic Qualifications: - 2-6 years of experience in layouts and CAD automation - Knowledges in SVRF or SKILL coding - Hands-on experience in script languages such as Perl, Python & shell - Experience in industry standard layout and verification tools (Preferred) - Experience in the standard cell domain (Preferred) - Good understanding of CMOS circuit design fundamentals (Preferred) - Communication skills and ability to work across multiple projects Preferred Qualifications: - Knowledge of scripting language is mandatory (Proficient in PERL/Python & SHELL scripting) TCL, and Svrf Scripting is needed. - Good Programming skills and hands on experience in Perl, Python , shell and tcl languages. - SVRF coding of rule decks and or modifying existing rules/SVRF for manipulating layout views. - Experience in EDA tool/flow/methodology, product and IP developments. - Understanding of Layouts and qualification methodologies - Familiarity with Layout tools like virtuoso and calibre, Simulators (HSPICE, FineSim), understanding of schematics, netlist syntax and other Validation tools. - Strong communication and interpersonal skills to champion initiatives internally and externally. - Programming expertise in html to develop dashboards and webpages is an additional plus.

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    6~10人應徵

    6/03 行政助理

    • 台南市東區
    • 1年以上
    • 高中

    1. 諳電腦，上網，中打40字以上 2. 物件key in整理，負責一般文書資料處理工作。 3. 維護、更新、管理各類文件檔案（如：合約、會議記錄、書目資料、活動文件）和資料庫系統。 4. 完成工作時程表，協助店頭完成事務 5. 需會使用繪圖軟體Illustrator(履歷上請註明) 6. 協助主管及專業人員從事一般行政業務 7. 辦理銀行現金存款、提款、匯款、轉帳作業。 8. 執行一般現金收付作業。 9. 完成例行廠商付款開票支付等作業。 10. 核對儲存現金與記錄是否相符合。 11. 管理零用金異動及撥補作業。 12. 公司不定期聚餐、員工旅遊 13. 享勞健保、團保

    月薪28,400~35,000元 員工10人
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    0~5人應徵

    5/31 Automotive Module-System Level Test Development Engineer, up to Staff(3061149)

    • 新竹縣竹北市
    • 5年以上
    • 大學

    Please apply via career website directly, we will review your profile in priority. https://qualcomm.wd5.myworkdayjobs.com/External/job/Hsinchu-City-TWN/System-Level-Test-Engineer--Staff_3061149 【Job Overview】 The QAM (Qualcomm Automotive Module) test group is responsible for delivering Test solutions for Qualcomm leading-edge Automotive Modules. In this role you will be expected to develop Test solutions including Test plan, Bring up, Test program, Qualification program working with Hardware, Software, System and Design teams. Responsibilities for this position include working with engineering teams for early-stage module bring-up and post-silicon validation efforts, work closely with software teams to evaluate integrated system performance, test, and characterize HW/SW interaction, device performance at various operating conditions (voltage, process and thermal), work with the production test teams to develop system test solution to screen QAM manufacturing issue. The individual selected for the position, needs to be proactive, able to work in a fast-paced dynamic environment. 【Principal Duties and Responsibilities】 • Evaluates, characterizes, and develops Test solutions for Qualcomm automotive module. • Interfaces with various cross-functional teams (e.g. Design, Software/System Engineering, Architecture Development, Packaging Team, Business Groups, Customer Engineering) to drive and incorporate the latest test solutions in the production program to improve the yield, test time, and quality. • Experience in project planning, giving direction to team • Experience in analyzing specifications, creating test plans and test execution is required. • Experience in developing test cases for Android/QNX-based devices is required. • Hands-on debugging/triaging experience on Module level issues using Android debugging tools and/or using JTAG Lauterbach/Trace32 is required. • Work with team to develop automatic reports, dashboards, and charts to share progress growth with key stack holders. • Required Logical reasoning and analytical skills to debug failures. Use technical expertise to identify solutions to test failures. • The candidate is expected to be self-driven to quickly get up to speed on various aspects of test developments & flexible to take up tasks as per the project needs. • Experience working with Perforce, GIT, or other Source Control SW is required. • Experience in production testing (Gauge R&R, shop floor) and handling OSATS is required • Experience on module testing, PCB debugs, SMT issues is required • Should be comfortable with reading Schematics and layout files of HW systems. • Good working knowledge of Android Architecture, Android Boot process, Kernel, Core BSP and Android Performance will be plus. • FA knowledge for driving module debugs is required. • Good system level understanding of the HW platforms having various peripherals like DDR, UFS, USB, Display, Camera, Power management IC is preferred. • Understanding of Module assembly, Boundary scan test and assembly defects will be plus. • Experience in Python, C#, .NET Framework, C/C++, Perl is a plus. • Working knowledge of system level benchmarks (e.g. like Dhrystone, AnTuTu, Monkey Test) will be a plus. 【Preferred qualification】 • Good in Korea • Minimum 8+ years of experience • Able to lead a team of 5+ • Experience in Module/System in Package/Board product testing at NPI or HVM. Experience with automotive product is a plus. • Rich Hands-on System/SW/bench test/ HW-SW interaction test experience, preferably in the Automotive/mobile devices/microprocessor industry. • Highly motivated, fast learner, team player with good communication skills. • Education: Master’s degree in Electrical Engineering, Electronics and Communication and Computer Science engineering. 【Minimum Qualifications】 • Minimum 8+ years • Experience in Module/System in Package/Board product testing at NPI or HVM. • Education: Bachelor’s degree in Electrical Engineering related

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    11~30人應徵

    5/31 Senior Hardware Validation and Manufacturing Engineer, Staff (Taipei)(3061442)

    • 台北市內湖區
    • 5年以上
    • 大學

    Qualcomm Cloud/Edge business unit is looking for an experienced hardware validation and manufacturing engineer to work with Taiwan based ODMs on developing PCIe Add In cards/modules targeting the AI inference market. Primary responsibilities include hardware validation, and manufacturing support of cards/boards/modules solution utilizing Qualcomm’s Cloud AI ASICs. Responsibilities: • Drive production functional test HW solution from design, develop, validation to MP implementation • Drive manufacturing testing process improvement with ODMs. • Coordinate test fixture/platform automation technically with suppliers, ODMs. • Define and provide procedure/document and technical support if needed. • Investigate and introduce new manufacturing test technology and methodology to enhance test and production efficiency. • Develop test strategy for new product features including identification, specification, design and qualification of test fixtures, test equipment and diagnostic software. • Provide onsite ODM support for builds as needed, frequently travel will be required. • Review and provide feedback for new strategies and test solution during the validation process. • Debug complex hardware and software issues during build phases. • Cooling System Testing Procedures: Develop and implement meticulous testing procedures for evaluating the performance and compatibility of cooling fluids and wetted materials in data center environments. These procedures will be critical in ensuring the reliability and efficiency of our systems. • Fluids and Materials Compatibility: Conduct in-depth analyses and studies to ensure compatibility between selected immersion fluids and wetted materials, considering factors such as chemical leaching from components into the fluid, component degradation, fluid degradation, heat transfer efficiency, corrosion resistance, and environmental impact. You will assist design teams in selection of correct TIMS, gap pads, capacitors, and other components compatible with immersion fluid chemistry. • Laboratory Testing: Collaborate with internal teams to develop comprehensive specifications, DOE for fluid and materials testing laboratories. • Assist bring up and debug of cards at ODMs. • Coordination across multiple development sites is required. This includes QUALCOMM sites as well as ODM/JDMs, both domestic (Taiwan) and international. Travel to other development and customer sites is also required. • Able to bring consensus to technical tradeoff decisions at the hardware, software and chip design levels. • Able to influence and bring technical recommendations or requirements across teams in other disciplines and geographic locations. • Coordinating and performing technical training for ODMs.

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    11~30人應徵

    5/31 Software Engineer for Design Workflow Automation (Hsinchu)(3060304)

    • 新竹市
    • 5年以上
    • 碩士

    General Summary: -Responsible for next-generation workflow automation for TECH IP engineers. -Design, develop, deploy, and improve highly scalable, long shelf-life workflows and automation platforms for compute and memory-heavy workloads. -Deconstruct user workflows into actionable tasks and plan a pathway to automation. Minimum Qualifications: -Master’s degree in Engineering, Computer Science, or a related technical field. -With 5+ years of experience in software development, and with data structures/algorithms -With 5+ years of python coding experience -Excellent grasp of workflows and UNIX processes, concurrency and load-balancing -Experience seeking and solving problems in partitioning and optimizing existing interconnected systems -Understand LSF infrastructure is a plus -Exposure to Perl, Make and VLSI flows is a plus

    待遇面議 外商公司
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    0~5人應徵

    5/31 HW Application Engineer-SI/PI (Taipei)(3052619)

    • 台北市內湖區
    • 2年以上
    • 碩士

    Please apply via【 https://careers.qualcomm.com/careers/job/446693422086】 ===================================================== 【Job Description】 The candidate will work within customer engineering team and need to provide electrical design expertise/simulation directly to customers in the areas of signal integrity and power integrity for the design of compute/wireless products and development systems. 【Responsibilities】 • Perform various PCBA board level PDN and SI simulation analyses using established methodologies, potentially from model extraction through simulation and reporting of conclusions. IO types include DDR memory, USB4, PCIe, MIPI CSI, eDP interfaces and variety of serial interfaces. • Perform laptop motherboard compliance end to end simulation （ ie: eye pattern) from SoC to Camera module ,USB connector via FPC/ retimer, eDP panel by using IBIS model. • Analyze and provide design guidance on PCB power distribution networks using established methodologies. • Document, distribute, and present results at appropriate meetings. • 2 to 4 years of experience in the following areas: • Electromagnetic theory and transmission lines • Basic signal and power integrity concepts • Commercial 3D electromagnetic field solver • Commercial SI or RF analysis tools • SPICE transient simulation including use of IBIS models The following experience is a plus • DDR and LPDDR design and analysis • High speed serial IO design and analysis • Ansys, Cadence/Sigrity, Keysight, SI/PI tools, and MATLAB desirable • Spreadsheets and similar productivity tools • Mentor or Cadence board design tools 【Education Requirements】 Minimum Bachelor degree in Electrical Engineering or related discipline, Master degree preferred You will be responsible for end-to-end interconnect design signoff and design guidelines for external customers. Candidates having sound knowledge in Signal processing techniques, Electromagnetic theory, Transmission lines design concepts will be highly preferred.

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    11~30人應徵

    6/06 ESD Design Engineer, Senior to Staff (Hsinchu) (3060411)

    • 新竹市
    • 5年以上
    • 大學

    This is a position in the ESD team working on ESD design and support in state of art CMOS/FinFET technology nodes for Qualcomm's advanced mobile baseband, Auto, IOE/IOT & consumer products. Join QCT's IP team in designing and implementing efficient ESD protection schemes for Qualcomm's next generation chipsets. The team is involved in the complete product lifecycle including ESD design from the development and library stage to tapeout as well as post-silicon support and debug of qualification failures and field returns. Responsibilities - ESD design and support at the IP & SOC levels including die and package - Developing ESD libraries and publishing ESD guidelines for circuit, layout and package designers based on the data collected from test chips and foundry - Participate in silicon validation and debugging ESD failures - ESD co-design by working closely with circuit engineers and packaging team - Working with Product testing and Reliability teams for qualification and meeting JEDEC specifications for ESD and Latch-up Skills/Experience - Experience with ESD Circuitry and Latchup along with debugging and FA - Familiarity with TLP/VFTLP - Transistor level circuit design/analysis knowledge (Analog & Digital) and device physics - Experience with Cadence circuit design tools (Schematic, Analog Artist, and Layout), PERC, ERC and Redhawk Pathfinder - Experience using Hspice (or any other Industry standard) Spice simulator. - Knowledge of full custom layout and experience working closely with mask designers is required - Familiarity with different IC package types (FlipChip, Wirebond, WLP) and associated ESD protection - Experience with FINFET technology is a plus - Familiarity with views for ASIC design flow such as LEF along with analysis of IR drop and LPE extraction is a plus - Good communication and teamwork skills - Ability to efficiently work on multiple projects simultaneously

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    0~5人應徵

    6/04 APAC Digital SOC Test Engineer, up to Sr. - Processor/Sensor Char Engineer (Zhubei)(3061392)

    • 新竹市
    • 經歷不拘
    • 大學

    Please submit your updated resume via https://qualcomm.wd5.myworkdayjobs.com/External/job/Hsinchu-City-TWN/APAC-Digital-SOC-Test-Engineer--Sr_3061392 We will review your profile in priority. Thanks! ============== Product and Test Development Engineering (PDTE) is looking for Digital Test Engineers who will create test solutions in support of New Product Introduction (Silicon Validation and Characterization) and Manufacturing Enablement of Qualcomm System on Chip (SOC) products. The position offers growth/specialization opportunities within Digital Test Engineering (Processors and Sensors). The individuals selected for the positions will need to be able to work in a fast paced and dynamic environment and be passionate about delivering quality work. As a Product Test Engineer, you will create Automatic Test Equipment (ATE) code/test methods and participate in data reviews which will require close collaboration with Design, Design for Test (DFT), Process, Product, and Manufacturing Engineers. 【Minimum Qualifications】 Master of Electrical/Electronics Engineering is preferred. Bachelor’s degree in Engineering, Information Systems, Computer Science, or related field. 【Requirements】 -Minimum 2 years of industry experience as a Product Test Engineer with hands on experience on Advantest 93K or Teradyne UFlex/IFlex. -Understanding of VLSI technologies, familiarity with Digital Baseband products. -Proficiency in programming language C/C++/VB/Java/Python is a plus. -Experience with data analytic tools such as O+, Data Power, Exensio and Machine Learning basics will be an added advantage. -Familiarity with Digital Communication concepts. Knowledge of Semiconductor Physics. -Ability to work with common test equipment (oscilloscope, spectrum analyzer, time interval analyzer, logic analyzer, network analyzer, etc).

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    11~30人應徵

    5/31 Hardware System/TFT Design Engineer (Hsinchu) (3061821)

    • 新竹市
    • 2年以上
    • 大學

    Please apply this role with English resume. Thank you. https://careers.qualcomm.com/careers/job/446698987826 =============================================== 【Responsibilities】 1. Qualified Hardware System/TFT Design Engineer in the position is responsible for Design and develop system solutions for biometrics products, with a focus on TFT design and board level circuit design. 2. Apply analog/digital integrated circuit design and verification expertise to the development of the next generation fingerprint sensors based on LTPS process technology. 3. Support design engineers to simulate, evaluate, and verify different mixed signal blocks, pixel, and periphery 4. Work with cross function teams (ASIC/Algorithm/SW/Manufacturing) for biometric performance optimization and feature development 5. Strong teamwork spirit and ability to collaborate effectively with other team members is important. 【Basic Qualifications】 1. 5+ years experience in area of hardware system design/TFT design/mixed signal circuit design 2. Strong command of Electrical Engineering fundamentals (mixed/analog circuit design) 3. Familiar with VLSI design and simulation flow 4. Familiar with Cadence ADE design environment or Cadence Virtuoso layout editor 5. Good knowledge of LTPS process flow is a plus 6. Experience using Matlab to conduct simulations/analysis is a plus 【Education Requirements】 B.S or higher in Electrical Engineering, or relevant technical field. Master degree in these fields preferred. Fluent in English, both verbal and written

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    11~30人應徵

    6/02 【歡迎應屆畢業】APAC Digital SOC Test Engineer-Structural ATPG /Integration/DC Char (3061495 )(Zhubei)

    • 新竹縣竹北市
    • 5年以上
    • 大學

    【Job Description】 Product and Test Development Engineering (PDTE) is looking for Digital Test Engineers who will create test solutions in support of New Product Introduction (Silicon Validation and Characterization) and Manufacturing Enablement of Qualcomm Silicon on Chip (SOC) products. The position offers growth/specialization opportunities within Digital Test Engineering (Structural ATPG Testing). The individuals selected for the positions will need to be able to work in a fast paced and dynamic environment and be passionate about delivering quality work. As a Product Test Engineer, you will create Automatic Test Equipment (ATE) code/test methods and participate in data reviews which will require close collaboration with Design, Design for Test (DFT), Process, Product, and Manufacturing Engineers. 【Minimum Qualifications】 • Bachelor’s degree in engineering, Information Systems, Computer Science, or related field. • Master of Electrical Engineering Preferred. 【Requirements】 • Minimum 2 years of industry experience as a Product Engineer with hands on experience on Advantest 93K or Teradyne UFlex/IFlex. • Understanding of VLSI technologies, familiarity with Digital Baseband products • Proficiency in programming language C/C++/VB/Java/Python is a plus. • Experience with data analytic tools such as O+, Data Power, Exensio and Machine Learning basics will be an added advantage. • Familiarity with Digital Communication concepts. Knowledge of Semiconductor Physics. • Ability to work with common test equipment (oscilloscope, spectrum analyzer, time interval analyzer, logic analyzer, network analyzer, etc).

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    11~30人應徵

    5/31 AI SW Application Engineer(Taipei)(3051717)

    • 台北市內湖區
    • 3年以上
    • 碩士

    To join Qualcomm Customer Engineering team and work with world leading WoS (Windows on Snapdragon) compute device makers from design & develop to commercially launching excitement or new Qualcomm compute SoC products. 【Responsibilities】 -Windows on ARM AI software porting, integration, and debugging. -Co-work with cross functional teams in Qualcomm to speed up the AI application development. -Work with OEMs to implement, integrate, customize AI features. -Support Hexagon Tensor Processor stability/performance issue debugging. -Create application notes, technical memo, and provide training to customers. -Ability to understand and explain technical information in a concise manner with strong communication skills between customers and developers. 【Skill/Experience】 -Bachelor's degree in computer science, Computer Engineering, or related field of study. -Good command of English with strong communication skills. -3+ years’ experience of programming experience with Python programming languages and/or C/C ++ programming languages. -Familiarity with AI or Machine Learning or Deep Learning approaches and frameworks. -Understanding of software testing, benchmarking, and continuous integration. 【Preferred Qualifications】 -Master degree in Computer Science, Computer Engineering, or a closely related field of study -Understanding of Qualcomm DSP Architecture -Experience in Qualcomm Neural Processing SDK -Working experience in Windows architecture and programming.

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    6~10人應徵

    5/31 AI Software Engineer, AI PC SDK (Multiple Levels)(Hsinchu/Taipei)(3056155)

    • 新竹市
    • 4年以上
    • 大學

    Job Overview: Qualcomm stands as a beacon of innovation, pioneering the forefront of on-device AI and unlocking the transformative potential of 5G. Our breakthroughs herald an era of unparalleled connectivity, sparking possibilities that will reshape industries, generate employment, and enrich lives. At the heart of this revolutionary era, Qualcomm's commitment to on-device AI leadership stands unmatched. Shaping 5G's potential into world-altering technologies demands inventive minds, diverse skills, and cultural backgrounds—a defining epoch known as the Age of Invention. Are you poised to immerse yourself in the forefront of technological evolution, comparable in significance to the advent of the Internet? Machine learning is poised to revolutionize EVERYTHING. In Taiwan, our AI Software Engineering team, collaborating extensively with global AI R&D teams, is at the helm of Qualcomm's pioneering advancements. Join us in leveraging your skills to expand Qualcomm's trailblazing AI portfolio (Qualcomm AI Stack), with a distinct emphasis on a software platform tailored for AI applications in Mobile, Automotive, IoT, and HPC devices, establishing our leadership in the AI PC domain. We integrate cutting-edge hardware with high-performance software, empowering rapid execution of deep neural networks on our unparalleled range of Snapdragon processors, setting the benchmark for minimal power consumption. Your role here is pivotal, enabling advanced machine learning scenarios atop Qualcomm's hardware and software infrastructure. You'll contribute to system software, tool development, maintenance, and evolution for various ML computing SDKs tailored for Qualcomm processors, both on Windows OS and Android OS. Amplifying the SDK's capabilities, collaborate with neural network frameworks like PyTorch and TensorFlow. Extend our neural net engine to support the latest DNNs emerging from the research community and optimize for the next-gen hardware acceleration cores. Additionally, validate engine performance and accuracy through meticulous analysis and comprehensive test coverage. Thrive in software development, wielding exceptional analytical, development, and debugging skills. Partner with industry leaders to usher in the next generation of machine learning technology, solidifying Qualcomm's pioneering stance in the AI PC domain. Expertise in at least one of the following areas - DSP software development and algorithm implementation: Proficiency in designing and implementing algorithms for Digital Signal Processing (DSP) in software. - OpenCL programming and debugging: Experience in programming and debugging using OpenCL, particularly for parallel computing applications. - Performance profiling and optimization for parallel computing: Strong understanding and practical experience in profiling and optimizing performance for parallel computing tasks. - Image processing, computer vision, and object/face detection specifically: Expertise in image processing, computer vision techniques, and specialized knowledge in object/face detection methodologies. - Understanding compiler technology: Familiarity with ML compilers such as TVM/Glow/XLA, as well as experience in LLVM/GCC backend development, optimization analysis, and implementation is highly advantageous. - AI experience: Knowledge of Deep Learning/CNN fundamentals, proficiency in training neural networks to solve real-world problems, and familiarity with frameworks like TensorFlow/PyTorch are considered strong assets for this role. Enthusiasm in machine learning technology. Hand-on experience in design/implementation of deep learning networks via modern frameworks, including TensorFlow, Pytorch, etc. Ability to quickly learn new technologies and work on resolving customer reported technical problems during mobile or wireless communication product development cycles. Excellent analytical, problem solving and Communication skills and willingness to work with customers.

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    11~30人應徵

    5/31 Python Full Stack Developer in Web Application Development (Hsinchu)(3060309)

    • 新竹市
    • 經歷不拘
    • 碩士

    General Summary: We seek a Full Stack Developer with advanced expertise in web application development and a strong focus on problem-solving and secure, standards-compliant coding. The candidate should be proficient in both front-end and back-end technologies, with a solid understanding of web infrastructure, Cloud, Linux, and Git and possess the ability to create clean and professional GUI interfaces, test and document software for software applications. Key Skills Angular/React, TypeScript, Python (Flask, NumPy, Pandas, SQLAlchemy), HTML, CSS, Power BI, SQL (Snowflake, MSSQL), JavaScript, Linux, Git, Web Deployment, SSL, JWT, RESTful APIs - Develop high-performance, secure front-end applications using React and TypeScript, ensuring adherence to coding standards. - Build robust, secure backend services with Python, using libraries like NumPy, Pandas, Flask, Django, and SQLAlchemy. Requirements - Troubleshoot and resolve complex technical issues in the development and production environments. - Manage deployment processes, including knowledge of ports, SSL, and other web infrastructure components. - Work within a Linux environment, utilizing Git for version control and collaboration. - Familiar with Splunk API is a plus Educational and Industrial Background - Master’s degree in Engineering, Computer Science, or a related technical field. - With 5+ years of experience in software development, and with data structures/algorithms. - With 5+ years of python coding experience

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    11~30人應徵

    5/31 System Level Test Development Engineer, Senior (3060412)

    • 新竹縣竹北市
    • 5年以上
    • 大學

    Overview: Engineer responsible for System level Test development and debug of failures for Mobile SOC. Work hands on with HW test systems in lab to develop system level tests, identify systematic HW issues/defects, debug failures, develop SW mitigations or test screens to reduce the customer issues. Interact with SW, System performance and Debug teams to evaluate integrated system performance, test and characterize HW/SW interaction, device performance at various operating conditions (voltage, process and thermal), work with the production test teams to develop effective production screens for system level issues. Responsible for clearly communicating engineering status of the tasks regularly to management. The position would have an opportunity to interact with different SW & HW teams to understand Premium tier mobile SOC Architecture and deep dive into HW and SW debugs, which requires significant interaction with teams located in US and India. Excellent communication and teamwork skills are a big plus. Effective time management skills to prioritize across multiple complex issues to ensure deliverables are met on time. The candidate is expected to be self-driven to quickly get up to speed on various aspects of test developments & flexible to take up tasks as per the project needs. Principal Duties and Responsibilities: • Coordinate and drive debug of failures from internal and customer test farms. Use technical expertise to identify solutions to test failures. • Consolidate the debug inputs, co-work with junior engineers in the lab to complete the debug and report back the results in a structured way to worldwide teams in US, India and Korea by being flexible and open-minded. • Interact with customer quality engineering team to understand the customer issues, replicate the issues in-house and work with internal teams to develop a resolution. • Strong understanding of SOC hardware, Software automation/build, android architecture, and arm architecture. • Need to work with lab instruments like Power Supplies, Multimeter, Spectrum analyzer protocol analyzer, memory analyzer and oscilloscope. • Hands-on debugging/triaging experience using Android debugging tools and/or using JTAG Lauterbach/Trace32 is required. • Experience in developing test cases for Android-based devices is required. • Experience with characterizing and benchmarking CPU, GPU, Memory, Multimedia blocks for performance KPIS, Thermal and Power KPIS of mobile SOC is preferred. • Thorough working knowledge of Android Architecture, Android Boot process, Kernel, Core BSP and Android Performance is required. • Work with team to develop automatic reports, dashboards, and charts to share progress growth with key stack holders. • Capture and document learning and implementation in upcoming projects • Strong software skills (C#, .NET framework, Java, C/C++, Visual Basic, Perl, Python etc.) for programming and debugging test codes. • Basic knowledge on USB Protocol, CPU, DSP, GPU, DDR will be a plus.

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    11~30人應徵

    5/31 IO/Verilog Characterization and Modeling Engineer (Hsinchu) (3060881)

    • 新竹市
    • 4年以上
    • 大學

    This is a Verilog modeling and characterization engineer position in Methodology, Flow and Design Kit team involved in defining methodologies, flows and in delivering design kit including behavioral models and timing models for I/Os, memories and standard cell libraries in state of art CMOS/FinFET technology nodes for Qualcomm's advanced mobile baseband, Auto, IOE/IOT & consumer products. Job Responsibilities - Write RTL models in Verilog for the different flavors of IOs. - Build verification plan and verify the design including both behavioral models and transistor level implementation. - Experience in System Verilog assertions(SVA), Power aware verification and formal verification is necessary. - Debug issues at IP level and SoC level. - Prior experience in analog/mixed signal simulations is preferred. - Solid understanding of VLSI circuits and Spice simulator experience along with commercial characterization tool experience is expected. - Understand the I/O circuit architecture and write stimulus for Timing/Power characterization. - Need to be familiar with various Liberty models including NLDM, CCS, LVF. - Work with internal customers to understand the requirements and support the SoC team on behavioral models and timing models throughout the design cycle. - Exposure to RTL to GDSII flow is required. Understanding of STA and exposure to the flow is necessary. - Interaction with tool vendors to drive the flow improvements and methodologies to address the requirements from latest technologies - Solid understanding of VLSI circuits and Spice simulator experience along with commercial characterization tool experience is expected. - Drive and build automation with any of the scripting languages like Python/Perl/TCL to improve the productivity and quality. - Responsible for developing new methodologies and flows to support complex designs, driving the design verification reviews, automation and drive productivity & quality.

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    0~5人應徵

    5/31 IP Memory Design Engineer (Hsinchu) (3059285)

    • 新竹市
    • 5年以上
    • 大學

    Job Description: This position involves designing and implementing Low-power, High Performance, area-efficient embedded memory (CPUL1/L2, SRAM, register files, etc.) circuits and architectures. Responsibilities: Develop memory architectures and circuit implementation techniques. Schematic entry, simulation of major blocks, layout planning, layout supervision and interface with CAD team for full verification and model generation.

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    0~5人應徵

    5/31 【應屆畢業】Digital System Level Test Engineer, Sr. (Zhubei)(3061426)

    • 新竹縣竹北市
    • 1年以上
    • 大學

    Please apply this role from our career site with English resume attached: https://qualcomm.wd5.myworkdayjobs.com/External/job/Hsinchu-City-TWN/Digital-System-Level-Test-Engineer--Sr_3061426 Thank you. ==================== 【Minimum Qualifications】 • 4-8 years of Hands on System / SW / bench test/ HW-SW interaction test experience, preferably in the mobile devices/microprocessor industry. • Experience with characterizing Processors, Graphics, Memory, Thermal and Power performance of ASICs is required. • Experience in developing test cases for Android-based devices is required. • Experience in production testing (Gauge R&R, shop floor) and handling OSATS is required • Experience in analyzing specifications, creating test plans and test execution is required. • Thorough working knowledge of Android Architecture, Android Boot process, Kernel, Core BSP and Android Performance is required. • Hands-on debugging/triaging experience using Android debugging tools and/or using JTAG Lauterbach/Trace32 is required. • Work with team to develop automatic reports, dashboards, and charts to share progress growth with key stack holders. • Required Logical reasoning and analytical skills to debug failures. Use technical expertise to identify solutions to test failures. • Good system level understanding of the HW platforms having various peripherals like DDR, UFS, USB, Display, Camera, Power management IC is preferred. 【Preferred Skillset】 • Experience with using measurement equipment e.g. Oscilloscopes, Power Supplies, Wireless Network Simulators, is desirable. • Experience in Module/System in Package/Board product testing at NPI or HVM. • Experience with automotive product is a plus. • Highly motivated, fast learner, team player with good communication skills. • Education: Master’s degree in Electrical Engineering, Electronics and Communication and Computer Science engineering. • Expertise / Familiarity with any one of the following is a plus • Characterizing high speed interfaces (HDMI, WiFi, PCIE, SATA, HSUSB) • CMOS digital and Mixed Signal circuits such as ADC, DAC, PLL, Codecs. • Experience in C#, .NET Framework, C/C++, Perl/Python is a plus. • Working knowledge of system level benchmarks (e.g. like Dhrystone, , AnTuTu, Monkey Test) • The candidate is expected to be self-driven to quickly get up to speed on various aspects of test developments & flexible to take up tasks as per the project needs. • Experience on module testing, PCB debugs, SMT issues is required • Should be comfortable with reading Schematics and layout files of HW systems. • Experience working with Perforce, GIT, or other Source Control SW is required.

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    11~30人應徵
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